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4Mx16 DDR SDRAM

EM658160

Etron Confidential

7

Rev. 1.1

Jan. 2002

•

CAS Latency Field (A6~A4)

This field specifies the number of clock cycles from the assertion of the Read command to the

first read data. The minimum whole value of CAS Latency depends on the frequency of CK.

The minimum whole value satisfying the following formula must be programmed into this field.

A6

A5

A4

CAS Latency

0

0

0

Reserved

01

0

2 clocks

01

1

3 clocks

1

0

1

Reserved

1

1

0

2.5 clocks

1

1

1

Reserved (3.5 clocks)

•

Test Mode field (A8~A7)

These two bits are used to enter the test mode and must be programmed to "00" in normal

operation.

A8

A7

Test Mode

0

0

Normal mode

1

0

DLL Reset

X

1

Test mode

•

( BS0, BS1)

BS1

BS0

An ~ A0

RFU

0

MRS Cycle

RFU

1

Extended Functions (EMRS)

Extended Mode Register Set (EMRS)

BS1

BS0

A11~ A1

A0

RFU

1

RFU

0

DLL Enable

RFU

1

RFU

1

DLL Disable