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EM637327TQ-5 Datasheet(PDF) 4 Page - Etron Technology, Inc. |
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EM637327TQ-5 Datasheet(HTML) 4 Page - Etron Technology, Inc. |
4 / 78 page EtronTech 1Mega x 32 SGRAM EM637327 Preliminary 4 August 1999 DQM0 - DQM3 Input Data Input/Output Mask: DQM0-DQM3 are byte specific, nonpersistent I/O buffer controls. The I/O buffers are placed in a high-z state when DQM is sampled HIGH. Input data is masked when DQM is sampled HIGH during a write cycle. Output data is masked (two-clock latency) when DQM is sampled HIGH during a read cycle. DQM3 masks DQ31- DQ24, DQM2 masks DQ23-DQ16, DQM1 masks DQ15-DQ8, and DQM0 masks DQ7- DQ0. DQ0- DQ31 Input/ Output Data I/O: The DQ0-31 input and output data are synchronized with the positive edges of CLK. The I/Os are byte-maskable during Reads and Writes. The DQs also serve as column/byte mask inputs during Block Writes. NC - No Connect: These pins should be left unconnected. VDDQ Supply DQ Power: Provide isolated power to DQs for improved noise immunity. VSSQ Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity. VDD Supply Power Supply: +3.3V ±0.3V VSS Supply Ground |
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