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FT24C16A-UTR-T Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers |
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FT24C16A-UTR-T Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers |
8 / 20 page 24C04A, 24C08A, 24C16A Figure 8: SCL and SDA Bus Timing AC CHARACTERISTICS 1.8 V 2.5-5.0 V Symbol Parameter Min Max Min Max Unit fSCL Clock frequency, SCL 400 1000 kHz tLOW Clock pulse width low 1.3 0.4 µs tHIGH Clock pulse width high 0.6 0.4 µs tI Noise suppression time(1) 180 120 ns tAA Clock low to data out valid 0.3 0.9 0.2 0.55 µs tBUF Time the bus must be free before a new transmission can start(1) 1.3 0.5 µs tHD.STA START hold time 0.6 0.25 µs tSU.STA START set-up time 0.6 0.25 µs tHD.DAT Data in hold time 0 0 µs tSU.DAT Data in set-up time 100 100 ns tR Input rise time(1) 0.3 0.3 µs tF Input fall time(1) 300 100 ns tSU.STO STOP set-up time 0.6 0.25 µs tDH Date out hold time 50 50 ns WR Write cycle time 5 5 ms Endurance(1) 25oC, Page Mode, 3.3V 1,000,000 Write Cycles Notes: 1. This Parameter is expected by characterization but are not fully screened by test. 2. AC Measurement conditions: RL (Connects to Vcc): 1.3KΩ Input Pulse Voltages: 0.3Vcc to 0.7Vcc Input and output timing reference Voltages: 0.5Vcc DS3001M-page8 © 2009 Fremont Micro Devices Inc. |
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