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PBL386652QNT Datasheet(PDF) 8 Page - Ericsson

Part # PBL386652QNT
Description  Subscriber Line Interface Circuit
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Manufacturer  ERICSSON [Ericsson]
Direct Link  http://www.ericsson.com
Logo ERICSSON - Ericsson

PBL386652QNT Datasheet(HTML) 8 Page - Ericsson

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PBL 386 65/2
8
Preliminary
Pin Description
Refer to figure 8.
PLCC SSOP
Symbol
Description
1
7
VBAT
Battery supply voltage. Negative with respect to BGND.
2
8
VBAT2
An optional second battery voltage, connected in series with a diode, or an external powerhandling
resistor connects to this pin.
3
9
AOV
Adaptive Overhead Voltage. If the pin is left open, then the overhead voltage is set internally to 3.1V
Peak
in off-hook and 1.4 V
Peak in on-hook. The overhead voltage will automatically adapt to signals > 3.1VPeak.
If the pin is connected to AGND, then no overhead voltage is set internally. The overhead voltage adapts
automatically to 0.6 V
Peak < signals < 6.2 VPeak.
4
10
PSG
Programmable Saturation Guard. The resistive part of the DC feed characteristic is programmed by a
resistor connected from this pin to VBAT.
5
11
LP
Low Pass filter. Saturation guard filter capacitor connected here to filter out noise and improve PSRR.
Other end of C
LP connects to VBAT.
6
12
DT
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
7
13
DR
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic
level low, indicating off-hook condition. The ring trip network connects to this input.
8
16
VEE
-5V to VBAT power supply.
9
17
REF
A 15 k
Ω resistor should be connected between this pin and AGND.
10
18
SPR
Silent Polarity Reversal. The polarity reversal time can be adjusted with a capacitor connected to AGND.
If pin is left open: Shortest polarity reversal time.
11
19
PLC
Prog. Line Current, the constant current part of the DC feed characteristic is programmed by a resistor
connected from this pin to AGND.
12
20
PLD
Programmable Loop Detector threshold. The loop detection threshold is programmed by a resistor
connected from this pin to AGND.
13
21
VCC
+5 V power supply.
14
22
C3
C1, C2 and C3 are digital inputs Controlling the SLIC operating states. Refer to section
15
23
C2
Operating states for details.
16
24
C1
17
14
NC
No Connect. Must be left open.
18
25
DET
Detector output. Active low when indicating loop or ring trip detection, active high when indicating ground
key detection
19
26
RSN
Receive Summing Node. 400 times the current flowing into this pin equals the metallic (transversal)
current flowing from RINGX to TIPX. Programming networks for two-wire impedance and receive gain
connect to the receive summing node.
20
27
AGND
Analog Ground, should be tied together with BGND.
21
28
VTX
Transmit vf output. The ac voltage difference between TIPX and RINGX, the ac metallic voltage, is
reproduced as an unbalanced GND referenced signal at VTX with a gain of -0.5. The two-wire
impedance programming network connects between VTX and RSN.
22
1
RRLY
Ring Relay driver output.
23
2
TS
Tip Sense should be connected to TIPX.
24
15
NC
No Connect. Must be left open.
25
3
HP
High Pass connection for ac/dc separation capacitor C
HP. Other end of CHP connects to RINGX.
26
4
RINGX
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
27
5
BGND
Battery Ground, should be tied together with AGND.
28
6
TIPX
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
}


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