PD45128441G5-A80I-9JF datasheet(9/89 Pages) ELPIDA

Part #	PD45128441G5-A80I-9JF

Description	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

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Manufacturer	ELPIDA [Elpida Memory]

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Preliminary Data Sheet E0233N10

9

µµµµPD45128441-I, 45128841-I, 45128163-I

13. Electrical Specifications ................................................................................................................ 34

13.1

AC Parameters for Read Timing ........................................................................................................ 39

13.2

AC Parameters for Write Timing ........................................................................................................ 41

13.3

Relationship between Frequency and Latency ................................................................................. 42

13.4

Mode Register Set ............................................................................................................................... 43

13.5

Power on Sequence and CBR (Auto) Refresh .................................................................................. 44

13.6

/CS Function ........................................................................................................................................ 45

13.7

Clock Suspension during Burst Read (using CKE Function) ......................................................... 46

13.8

Clock Suspension during Burst Write (using CKE Function) ......................................................... 48

13.9

Power Down Mode and Clock Mask .................................................................................................. 50

13.10 CBR (Auto) Refresh ............................................................................................................................. 51

13.11 Self Refresh (Entry and Exit) .............................................................................................................. 52

13.12 Random Column Read (Page with Same Bank) ............................................................................... 53

13.13 Random Column Write (Page with Same Bank) ............................................................................... 55

13.14 Random Row Read (Ping-Pong Banks) ............................................................................................ 57

13.15 Random Row Write (Ping-Pong Banks) ............................................................................................ 59

13.16 Read and Write .................................................................................................................................... 61

13.17 Interleaved Column Read Cycle ......................................................................................................... 63

13.18 Interleaved Column Write Cycle ......................................................................................................... 65

13.19 Auto Precharge after Read Burst ....................................................................................................... 67

13.20 Auto Precharge after Write Burst ....................................................................................................... 69

13.21 Full Page Read Cycle .......................................................................................................................... 71

13.22 Full Page Write Cycle .......................................................................................................................... 73

13.23 Byte Write Operation ........................................................................................................................... 75

13.24 Burst Read and Single Write (Option) ............................................................................................... 77

13.25 Full Page Random Column Read ....................................................................................................... 79

13.26 Full Page Random Column Write ....................................................................................................... 81

13.27 PRE (Precharge) Termination of Burst .............................................................................................. 83

14. Package Drawing ............................................................................................................................ 85

15. Recommended Soldering Conditions .......................................................................................... 86

16. Revision History ............................................................................................................................. 87

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Elpida Memory	PD45128441-T	713Kb / 89P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

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Similar Description - PD45128441G5-A80I-9JF

Manufacturer	Part #	Datasheet	Description
Elpida Memory	PD45128441-T	713Kb / 89P	128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
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NEC	UPD45128441	1Mb / 92P	128M-bit Synchronous DRAM 4-bank, LVTTL
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