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S-8209A Datasheet(PDF) 9 Page - Seiko Instruments Inc |
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S-8209A Datasheet(HTML) 9 Page - Seiko Instruments Inc |
9 / 26 page BATTERY PROTECTION IC WITH CELL-BALANCE FUNCTION Rev.3.4_00 S-8209A Series Seiko Instruments Inc. 9 Electrical Characteristics Table 7 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Overcharge detection voltage VCU − VCU − 0.025 VCU VCU + 0.025 V 1 Overcharge release voltage VCL VCL ≠ VCU VCL − 0.05 VCL VCL + 0.05 V 1 VCL = VCU VCL − 0.05 VCL VCL + 0.025 V 1 Cell-balance detection voltage VBU − VBU − 0.025 VBU VBU + 0.025 V 1 Cell-balance release voltage VBL VBL ≠ VBU VBL − 0.05 VBL VBL + 0.05 V 1 VBL = VBU VBL − 0.05 VBL VBL + 0.025 V 1 Overdischarge detection voltage VDL − VDL − 0.05 VDL VDL + 0.05 V 1 Overdischarge release voltage VDU − VDU − 0.10 VDU VDU + 0.10 V 1 CDT pin resistance *1 RCDT VDS = 3.5 V,VCDT = 0 V 4.76 8.31 10.9 M Ω 2 CDT pin detection voltage *1 VCDET VDS = 3.5 V VDS × 0.65 VDS × 0.70 VDS × 0.75 V 3 Operation voltage between VDD pin and VSS pin VDSOP Output voltage of CO pin, DO pin and CB pin fixed 1.5 − 8.0 V − CTLC pin H voltage VCTLCH VDS = 3.5 V VDS × 0.55 − VDS × 0.90 V 4 CTLD pin H voltage VCTLDH VDS = 3.5 V VDS × 0.55 − VDS × 0.90 V 4 CTLC pin L voltage VCTLCL VDS = 3.5 V VDS × 0.10 − VDS × 0.45 V 4 CTLD pin L voltage VCTLDL VDS = 3.5 V VDS × 0.10 − VDS × 0.45 V 4 Current consumption during operation *2 IOPE VDS = 3.5 V − 3.5 7.0 μA 5 Source current CTLC *2 pin ICTLCH VDS = 3.5 V, VCTLC = 0 V 320 400 480 nA 6 Source current CTLD *2 pin ICTLDH VDS = 3.5 V, VCTLD = 0 V 320 400 480 nA 6 Source current CB pin ICBH VCB = 4.0 V, VDS = 4.5 V 30 − − μA 7 Sink current CB pin ICBL VCB = 0.5 V, VDS = 3.5 V 30 − − μA 7 Sink current CO pin ICOL VCO = 0.5 V, VDS = 3.5 V 30 − − μA 7 Leakage current CO pin ICOH VCO = 24 V, VDS = 4.5 V − − 0.1 μA 8 Sink current DO pin IDOL VDO = 0.5 V, VDS = 3.5 V 30 − − μA 7 Leakage current DO pin IDOH VDO = 24 V, VDS = 1.8 V − − 0.1 μA 8 *1. In the S-8209A Series, users are able to set delay time for the output pins. By using the following formula, delay time is calculated with the value of CDT pin’s resistance in the IC (RCDT) and the value of capacitor set externally at the CDT pin (CCDT). tD [s] = −ln (1 − VCDET / VDS) × CCDT [μF] × RCDT [MΩ] = −ln (1 − 0.7 typ.) × CCDT [μF] × 8.31 MΩ typ. = 10.0 M Ω typ. × CCDT [μF] In case of the capacitance of CDT pin CCDT = 0.01 μF, the output pin delay time tD is calculated by using the above formula and as follows. tD [s] = 10.0 M Ω typ. × 0.01 μF = 0.1 s typ. Test RCDT and the CDT pin detection voltage (VCDET) by test circuits shown in this datasheet after applying the power supply while pulling-down the CTLC pin and the CTLD pin to the level of VSS pin outside the IC. *2. In case of using CTLC pin and CTLD pin pulled-down to the level of VSS pin externally, the current flows into the VDD pin (IDD) is calculated by the following formula. IDD = IOPE + ICTLCH + ICTLDH |
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