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EL2150CS Datasheet(PDF) 4 Page - Elantec Semiconductor

Part # EL2150CS
Description  125 MHz Single Supply, Clamping Op Amps
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Manufacturer  ELANTEC [Elantec Semiconductor]
Direct Link  http://www.elantec.com
Logo ELANTEC - Elantec Semiconductor

EL2150CS Datasheet(HTML) 4 Page - Elantec Semiconductor

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EL2150CEL2157C
125 MHz Single Supply Clamping Op Amps
Closed Loop AC Electrical Characteristics
(Notes26)VSea5V GNDe0V TAe25 C VCMea15V VOUTea15V VCLAMPea5V VENABLEea5V AVea1
RFe0X RLe150X to GND pin unless otherwise specified
Parameter
Description
Conditions
Min Typ Max
Test
Units
Level
BW
b
3 dB Bandwidth (VOUTe400 mVp-p) VSea5V AVea1 RF e 0X
125
V
MHz
VSea5V AVeb1 RFe500X
60
V
MHz
VSea5V AVea2 RFe500X
60
V
MHz
VSea5V AVea10 RFe500X
6
V
MHz
VSea12V AVea1 RFe0X
150
V
MHz
VSea3V AVea1 RFe0X
100
V
MHz
BW
g
01 dB Bandwidth (VOUTe400 mVp-p) VSea12V AVea1 RFe0X
25
V
MHz
VSea5V AVea1 RFe0X
30
V
MHz
VSea3V AVea1 RFe0X
20
V
MHz
GBWP
Gain Bandwidth Product
VSea12V
AVea10
60
V
MHz
PM
Phase Margin
RLe1kX CLe6pF
55
V
SR
Slew Rate
VSea10V RLe150X Vout e 0V to a6V
200 275
I
V
ms
VSea5V RLe150X VOUTe0V to a3V
300
V
V
ms
tR tF
Rise Time Fall Time
g
01V step
28
V
ns
OS
Overshoot
g
01V step
10
V
%
tPD
Propagation Delay
g
01V step
32
V
ns
tS
01% Settling Time
VSe g5V RLe500X AVea1 VOUTe g3V
40
V
ns
001% Settling Time
VSe g5V RLe500X AVea1 VOUTe g3V
75
V
ns
dG
Differential Gain (Note 7)
AVea2 RFe1kX
005
V
%
dP
Differential Phase (Note 7)
AVea2 RFe1kX
005
V
eN
Input Noise Voltage
fe10 kHz
48
V
nV
0Hz
iN
Input Noise Current
fe10 kHz
125
V
pA
0Hz
tDIS
Disable Time (Note 8)
50
V
ns
tEN
Enable Time (Note 8)
25
V
ns
tCL
Clamp Overload Recovery
7
V
ns
Note 1 Internal short circuit protection circuitry has been built into the EL2150CEL2157C See the Applications section
Note 2 CLAMP pin and ENABLE pin specifications apply only to the EL2157C
Note 3 If the disable feature is not desired tie the ENABLE pin to the VS pin or apply a logic high level to the ENABLE pin
Note 4 The maximum output voltage that can be clamped is limited to the maximum positive output Voltage or VOP Applying a
Voltage higher than VOP inactivates the clamp If the clamp feature is not desired either tie the CLAMP pin to the VS pin
or simply let the CLAMP pin float
Note 5 The clamp accuracy is affected by VIN and RL See the Typical Curves Section and the Clamp Accuracy vs VIN
RL curve
Note 6 All AC tests are performed on a ‘‘warmed up’’ part except slew rate which is pulse tested
Note 7 Standard NTSC signal e 286 mVp-p fe358MHz as VIN is swept from 06V to 1314V RL is DC coupled
Note 8 DisableEnable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply
current has reached half its final value
4


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