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KSZ9031RNX-EVAL Datasheet(PDF) 1 Page - Micrel Semiconductor |
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KSZ9031RNX-EVAL Datasheet(HTML) 1 Page - Micrel Semiconductor |
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1 / 75 page  KSZ9031RNX Gigabit Ethernet Transceiver with RGMII Support Data Sheet Rev. 1.0 LinkMD is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 ( 408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com October 2012 M9999-103112-1.0 General Description The KSZ9031RNX is a completely integrated triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physical- layer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable. The KSZ9031RNX provides the Reduced Gigabit Media Independent Interface (RGMII) for direct connection to RGMII MACs in Gigabit Ethernet processors and switches for data transfer at 10/100/1000Mbps. The KSZ9031RNX reduces board cost and simplifies board layout by using on-chip termination resistors for the four differential pairs and by integrating an LDO controller to drive a low-cost MOSFET to supply the 1.2V core. The KSZ9031RNX offers diagnostic features to facilitate system bring-up and debugging in production testing and in product deployment. Parametric NAND tree support enables fault detection between KSZ9031 I/Os and the board. The LinkMD ® TDR-based cable diagnostic identifies faulty copper cabling. Remote and local loopback functions verify analog and digital data paths. The KSZ9031RNX is available in a 48-pin, lead-free QFN package (see “Ordering Information”). Data sheets and support documentation are available on Micrel’s web site at: www.micrel.com. Features • Single-chip 10/100/1000Mbps IEEE 802.3 compliant Ethernet transceiver • RGMII timing supports on-chip delay according to RGMII Version 2.0, with programming options for external delay and making adjustments and corrections to TX and RX timing paths • RGMII with 3.3V/2.5V/1.8V tolerant I/Os • Auto-negotiation to automatically select the highest link- up speed (10/100/1000Mbps) and duplex (half/full) • On-chip termination resistors for the differential pairs • On-chip LDO controller to support single 3.3V supply operation – requires only one external FET to generate 1.2V for the core • Jumbo frame support up to 16KB • 125MHz reference clock output • Energy detect power-down mode for reduced power consumption when the cable is not attached • Energy Efficient Ethernet (EEE) support with low-power idle (LPI) mode and clock stoppage for 100Base-TX/ 1000Base-T and transmit amplitude reduction with 10Base-Te option • Wake-on-LAN (WOL) support with robust custom-packet detection Functional Diagram |
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