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MAR3691ND Datasheet(PDF) 9 Page - Dynex Semiconductor |
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MAR3691ND Datasheet(HTML) 9 Page - Dynex Semiconductor |
9 / 41 page MA3690/1/3 9/41 PASSIVE MONITOR The terminal may be configured into a Passive Monitor (or Bus Monitor) merely by selecting the appropriate Function Code of the Instruction word. By doing this the terminal will not take part in any further Instruction execution but instead will monitor the selected bus for data transmissions. INTERRUPT / RETRY CAPABILITY The terminal has certain in-built functions which permit the terminal to retrieve situations which would normally cause a greater degree of subsystem intervention. This is achieved by having an automatic retry facility in-built to the terminal which is selectable from the Instruction word. In this case both the condition and number of attempts for which the terminal must try may be specified. After completion of the required number of attempts, terminal operation may be halted with the possibility of an interrupt generated also. The interrupt facility provides a means of more direct subsystem interaction in the event of a failure. Similar flags are required to be set in the Instruction word before a selectable interrupt may be generated. This form of interrupt also includes an Interrupt Always flag whose application may be used to determine subsystem/system timing requirements. It should be noted that an interrupt may also be generated by the error checking procedures of the terminal which verify aspects of the Instruction word and associated Receive/ Transmit command words. STANDBY BUS CONTROLLER The terminal provides a number of signals to the subsystem for message addressing and execution. Two address lines are provided (CO, Cl) plus a signal to increment an external counter (INCADRN). This, together with the on- chip sequencing, error checking, etc., enables a standby bus controller, using a fixed table of messages, to be realised in few devices as shown in Figure 2. It is therefore possible to attain a standby BC on a single 6 x 4 PCB card. Figure 2: Standby Bus Controller |
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