MA28155 datasheet(8/20 Pages) DYNEX

Part #	MA28155

Description	Radiation Hard Programmable Peripheral Interface

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Manufacturer	DYNEX [Dynex Semiconductor]

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MA28155

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Output Control Signal Definition (Mode 1)

OBFN

OBFN (Output Buffer Full Register Bit).

The OBFN output will go low to indicate that the CPU has

written data out to the specified port. The OBF register bit will

be set by the rising edge of the DSN input and reset by ACKN

input being low.

ACKN

ACKN (Acknowledge Input).

A low on this input informs the 28155 that the data from

port A or port B has been accepted; in essence, a response

from the peripheral device indicating that it has received the

data output by the CPU.

INTR (Interrupt Request).

A high on this output can be used to interrupt the CPU

when an output device has accepted data transmitted by the

CPU. INTR is set when ACKN is high, OBFN is high and INTE

is high. It is reset by the falling edge of DSN

.

INTE A: Controlled by bit set/reset of PC6

INTE B: Controlled by bit set/reset of PC2

Figure 11: Strobed Output (PORT A)

Figure 12: Strobed Output (PORT B)

DSN

RD/WN

ACKAN

OBFAN

RD/WN

DSN

ACKBN

OBFBN

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