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http://www.union-ic.com Rev.02 Jan.2014

9/14

UM3487E

Figure 6. Receiver Propagation Delay Test Circuit

DI

3V

L1

0V

L2

1.5V

1.5V

0V

90%

90%

10%

10%

Output Normally Low

Output Normally High

DE

3V

L1

0V

L2

1.5V

1.5V

1.4V

1.4V

Figure 7. Driver Propagation Delays

Figure 8. Driver Enable and Disable Times

RO

1V

-1V

L1

L2

1.5V

1.5V

OUTPUT

INPUT

Output Normally Low

Output Normally High

RE

3V

0V

RO

1.5V

1.5V

1.5V

1.5V

Figure 9. Receiver Propagation Delays

Figure 10. Receiver Enable and Disable Times

ATE

R

B

A

Receiver

Output