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EVB-EN5335QI Datasheet(PDF) 3 Page - Altera Corporation |
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EVB-EN5335QI Datasheet(HTML) 3 Page - Altera Corporation |
3 / 15 page EN5335QI 3 www.altera.com/enpirion Pin Descriptions PIN NAME FUNCTION 1-3 NC NO CONNECT – Do not electrically connect these pins to each other or to PCB. 4-6 NC(SW) No Connect. These pins are internally connected to the switch node of the internal MOSFETs. NC(SW) pins are not to be electrically connected to any external signal, ground, or voltage. 7 NC No connect – Do not electrically connect these pins to each other or to PCB. 8-14 VOUT Regulated converter output. Connect these pins to the load and place output capacitor from these pins the PGND pins 17-18 15 NC(SW) No Connect. These pins are internally connected to the switch node of the internal MOSFETs. NC(SW) pins are not to be electrically connected to any external signal, ground, or voltage. 16 NC No connect – Do not electrically connect these pins to each other or to PCB. 17-20 PGND Output power ground. Connect these pins to the ground electrode of the output filter capacitors. Refer to layout guideline section. 21-24 PVIN Input power supply. Connect to input power supply. Decouple with input capacitor to PGND (pins 19-20). 25-26 NC No connect – Do not electrically connect these pins to each other or to PCB. 27 ROCP Optional Over Current Protection adjust pin. Place ROCP resistor between this pin and AGND (pin 40) to increase the over current trip point by 50%. 28 AVIN Analog voltage input for the controller circuits. Connect this pin to the input power supply. 29 AGND Analog ground for the controller circuits. 30-31 NC No connect – Do not electrically connect these pins to each other or to PCB. 32 VS2 Voltage select line 2 input. See Table 1. 33 VS1 Voltage select line 1 input. See Table 1. 34 VS0 Voltage select line 0 input. See Table 1. 35 POK Power OK is an open drain transistor for power system state indication. POK is a logic high when VOUT is with -10% to +20% of VOUT nominal. 36 VSENSE Remote voltage sense input. Connect this pin to the load voltage at the point to be regulated. 37 SS Soft-Start node. The soft-start capacitor is connected between this pin and AGND. The value of this resistor determines the startup timing. 38 EAIN Optional Error Amplifier input. Allows for customization of the control loop. 39 EAOUT Optional Error Amplifier output. Allows for customization of the control loop. 40 COMP Optional Error Amplifier Buffer output. Allows for customization of the control loop. 41 ENABLE Input Enable. Applying a logic high, enables the output and initiates a soft- start. Applying a logic low disables the output. 42-44 NC No connect – Do not electrically connect these pins to each other or to PCB. 00846 October 11, 2013 Rev J |
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