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ISL62883IRTZ Datasheet(PDF) 11 Page - Intersil Corporation

Part # ISL62883IRTZ
Description  Multiphase PWM Regulator for IMVP-6.5??Mobile CPUs
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL62883IRTZ Datasheet(HTML) 11 Page - Intersil Corporation

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ISL62883, ISL62883B
11
FN6891.4
June 21, 2011
Theory of Operation
Multiphase R3
Modulator
The ISL62883 is a multiphase regulator, which implements Intel™
IMVP-6.5™ protocol. It can be programmed for 1-, 2- or 3-phase
operation for microprocessor core applications. It uses Intersil
patented R3™ (Robust Ripple Regulator™) modulator. The R3
modulator combines the best features of fixed frequency PWM
and hysteretic PWM while eliminating many of their shortcomings.
Figure 3 conceptually shows the ISL62883 multiphase R3
modulator circuit, and Figure 4 shows the operation principles.
A current source flows from the VW pin to the COMP pin, creating
a voltage window set by the resistor between the two pins. This
voltage window is called VW window in the following discussion.
Inside the IC, the modulator uses the master clock circuit to
generate the clocks for the slave circuits. The modulator
discharges the ripple capacitor Crm with a current source equal
to gmVo, where gm is a gain factor. Crm voltage Vcrm is a
sawtooth waveform traversing between the VW and COMP
voltages. It resets to VW when it hits COMP, and generates a one-
shot master clock signal. A phase sequencer distributes the
master clock signal to the slave circuits. If the ISL62883 is in
3-phase mode, the master clock signal will be distributed to the
three phases, and the Clock1~3 signals will be 120° out-of-
phase. If the ISL62883 is in 2-phase mode, the master clock
signal will be distributed to Phases 1 and 2, and the Clock1 and
Clock2 signals will be 180° out-of-phase. If the ISL62883 is in
1-phase mode, the master clock signal will be distributed to
Phases 1 only and be the Clock1 signal.
Each slave circuit has its own ripple capacitor Crs, whose voltage
mimics the inductor ripple current. A gm amplifier converts the
inductor voltage into a current source to charge and discharge
Crs. The slave circuit turns on its PWM pulse upon receiving the
clock signal, and the current source charges Crs. When Crs
FIGURE 3. R3
MODULATORCIRCUIT
Crm
gmVo
MASTER
CLOCK
VW
COMP
MASTER
CLOCK
Phase
Sequencer
Clock1
Clock2
R
IL1
gm
Clock1
Phase1
Crs1
VW
S
Q
PWM1
L1
R
IL2
gm
Clock2
Phase2
Crs2
VW
S
Q
PWM2
L2
Co
Vo
Vcrm
Vcrs1
Vcrs2
MASTER CLOCK CIRCUIT
SLAVE CIRCUIT 1
SLAVE CIRCUIT 2
R
IL3
gm
Clock3
Phase3
Crs3
VW
S
Q
PWM3
L3
Vcrs3
SLAVE CIRCUIT 3
Clock3
FIGURE 4. R3
MODULATOR OPERATION PRINCIPLES IN
STEADY STATE
COMP
Vcrm
Master
Clock
PWM1
VW
Clock1
PWM2
Clock2
Hysteretic
Window
PWM3
Vcrs3
Clock3
Vcrs2
Vcrs1
VW
FIGURE 5. R3
MODULATOROPERATION PRINCIPLES IN LOAD
INSERTION RESPONSE
COMP
Vcrm
Master
Clock
PWM1
Vcrs1
VW
Clock1
PWM2
Vcrs2
Clock2
PWM3
Clock3
Vcrs3
VW


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