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C8051F912-GU Datasheet(PDF) 1 Page - Silicon Laboratories |
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C8051F912-GU Datasheet(HTML) 1 Page - Silicon Laboratories |
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1 / 3 page  Low-Voltage/Low-Power Copyright © 2009 by Silicon Laboratories 10.1.2009 Port 0 Drivers Digital Peripherals UART Timers 0, 1, 2, 3 PCA/ WDT SMBus Priority Crossbar Decoder P0.0/VREF P0.1/AGND P0.2/XTAL1/RTCOUT P0.3/XTAL2/WAKEOUT P0.4/TX P0.5/RX P0.6/CNVSTR P0.7/IREF0 Crossbar Control Port I/O Configuration CIP-51 8051 Controller Core 16k Byte ISP Flash Program Memory 256 Byte SRAM SFR Bus 512 Byte XRAM Port 1 Drivers P1.0/SCK1 P1.1/MISO1 P1.2/MOSI1 P1.3/NSS1 P1.4 P1.5 Port 2 Drivers SPI 0,1 Analog Peripherals Comparators + - Power Net VDD/DC+ GND/DC- XTAL1 SYSCLK System Clock Configuration External Oscillator Circuit Precision 24.5 MHz Oscillator Debug / Programming Hardware Power On Reset/PMU Reset C2D C2CK/RST Wake 12-bit ADC A M U X Temp Sensor External VREF Internal VREF VDD XTAL2 Low Power 20 MHz Oscillator 6-bit IREF VREF GND P1.6 IREF0 CP0, CP0A P2.7/C2D + - CP1, CP1A smaRTClock Oscillator XTAL3 XTAL4 DC/DC Converter VBAT GND VREG Digital Power Analog Power CRC Engine DCEN C8051F912 Ultra-Low Power, High-Performance MCU Ultra-Low Power - 160 µA/MHz active current from 1.8–3.6 V @ 25 MHz - 10 nA sleep current with data retention; BOD disabled - 50 nA sleep current with data retention; BOD enabled - 300 nA sleep current with smaRTClock (internal oscillator) - 600 nA sleep current with smaRTClock (external crystal) - 2 µs wake up from sleep - 1.5 µs analog settling time Supply Voltage: 0.9 to 3.6 V - One-cell mode supports 0.9–3.6 V operation; bypass feature automatically shuts off the dc-dc converter when not needed - Two-cell mode supports 1.8–3.6 V operation - Built-in dc-dc converter with 1.8 –3.3 V output (65 mW max) for use in one-cell mode; can supply external devices 12-Bit Analog to Digital Converter - Up to 75 ksps 12-bit mode or 300 ksps 10-bit mode - Up to 15 external inputs - External pin or internal VREF (no external capacitor required) - On-chip PGA allows measuring voltages up to twice the reference voltage - Autonomous Burst Mode with 16-bit automatic averaging accumulator - Built-in temperature sensor Two Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (400 nA typical) - Up to 15 Capacitive Touch Sense inputs Internal 6-Bit Current Reference - Up to ±500 µA; source and sink capability - Enhanced resolution via PWM interpolation Development Kit: C8051F912DK High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - 25 MIPS peak throughput with 25 MHz clock - Expanded interrupt handler Memory - 768 bytes internal data RAM (256 + 512) - 16 kB Flash; In-system programmable; Full read/write/erase functionality over the entire supply range Digital Peripherals - 16 port I/O; All 5 V tolerant with programmable drive strength - Hardware enhanced UART, 2 SPI and SMBus™ serial ports available concurrently - Low power 32-bit smaRTClock operates down to 0.9 V - Four general purpose 16-bit counter/timers - 16-bit programmable counter array (PCA) with six capture/com- pare modules and watchdog timer Clock Sources - Precision internal oscillators: 24.5 MHz with ±2% accuracy sup- ports UART operation; spread-spectrum mode for reduced EMI - Low power internal oscillator: 20 MHz - External oscillator: Crystal, RC, C, CMOS clock - smaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz LFO - Can switch between clock sources on-the-fly; useful in power saving modes On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- system debug (no emulator required) - Provides 4 breakpoints, single stepping Package Options - 24-pin QFN (4x4 mm), RoHS compliant - 24-pin QSOP (easy to hand solder), RoHS compliant Temperature Range: –40 to +85 °C |
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