BUK9K18-40E115 datasheet(3/13 Pages) NXP

Part #	BUK9K18-40E115

Description	Dual N-channel TrenchMOS logic level FET

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Manufacturer	NXP [NXP Semiconductors]

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NXP Semiconductors

BUK9K18-40E

Dual N-channel TrenchMOS logic level FET

BUK9K18-40E

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Product data sheet

23 April 2013

3 / 13

Symbol

Parameter

Conditions

Min

Max

Unit

Ptot

total power dissipation

Tmb = 25 °C; Fig. 2

-

38

W

Tstg

storage temperature

-55

175

°C

Tj

junction temperature

-55

175

°C

Tsld(M)

peak soldering temperature

-

260

°C

Source-drain diode FET1 and FET2

IS

source current

Tmb = 25 °C

-

30

A

ISM

peak source current

pulsed; tp ≤ 10 µs; Tmb = 25 °C

-

124

A

Avalanche Ruggedness FET1 and FET2

EDS(AL)S

non-repetitive drain-source

avalanche energy

ID = 30 A; Vsup ≤ 40 V; VGS = 5 V;

Tj(init) = 25 °C; Fig. 3

[3][4]

-

22

mJ

[1] Accumulated Pulse duration up to 50 hours delivers zero defect ppm

[2] Significantly longer life times are achieved by lowering Tj and or VGS.

[3] Refer to application note AN10273 for further information

[4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C

003aaj625

0

10

20

30

40

0

50

100

150

200

Tmb(°C)

ID

(A)

Fig. 1. Continuous drain current as a function of

mounting base temperature

Tmb (°C)

0

200

150

50

100

03aa16

40

80

120

Pder

(%)

0

Fig. 2. Normalized total power dissipation as a

function of mounting base temperature

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BUK9K18-40E115 Datasheet(PDF) 3 Page - NXP Semiconductors

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