DS5002FP Secure Microprocessor Chip

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Table 1. Serial Bootstrap Loader Commands

COMMAND

FUNCTION

C

Return CRC-16 of the program/data NV RAM

D

Dump Intel Hex file

F

Fill program/data NV RAM

G

Get data from P1, P2, and P3

I

N/A on the DS5002FP

L

Load Intel Hex file

M

Toggle modem available bit

N

Set freshness seal—all program and data is lost

P

Put data into P0, P1, P2, and P3

R

Read status of NV SFRs (MCON, RPCTL, MSL, CALIB)

T

Trace (echo) incoming Intel Hex code

U

Clear Security Lock

V

Verify program/data NV RAM with incoming Intel Hex data

W

Write special function registers (MCON, RPCTL, MSL, CALIB)

Z

Set security lock

Execution of certain bootstrap loader commands result in the loading of the newly generated 64-bit random number

into the encryption key word. These commands are as follows:

Fill

F

Load

L

Dump D

Verify V

CRC

C

Execution of the Fill and Load commands result in the data loaded into the NV RAM in an encrypted form

determined by the value of the newly generated key word. The subsequent execution of the Dump command within

the same bootstrap session causes the contents of the encrypted RAM to be read out and transmitted back to the

host PC in decrypted form. Similarly, execution of the Verify command within the same bootstrap session causes

the incoming absolute hex data to be compared against the true contents of the encrypted RAM, and the CRC

command returns the CRC value calculated from the true contents of the encrypted RAM. As long as any of the

above commands are executed within the same bootstrap session, the loaded key value remains the same, and

the contents of the encrypted program/data NV RAM can be read or written normally and freely until the security

lock bit is set.

When the security lock bit is set using the Z command, no further access to the true RAM contents is possible

using any bootstrap command or by any other means.

INSTRUCTION SET

The DS5002FP executes an instruction set that is object code-compatible with the industry standard 8051

microcontroller. As a result, software development packages such as assemblers and compilers that have been

written for the 8051 are compatible with the DS5002FP. A complete description of the instruction set and operation

are provided in the Secure Microcontroller User’s Guide.

Also note that the DS5002FP is embodied in the DS2252T module. The DS2252T combines the DS5002FP with

between 32k and 128k of SRAM, a lithium cell, and a real-time clock. This is packaged in a 40-pin SIMM module.

MEMORY ORGANIZATION

Figure 10 illustrates the memory map accessed by the DS5002FP. The entire 64k of program and 64k of data are

potentially available to the byte-wide bus. This preserves the I/O ports for application use. The user controls the

portion of memory that is actually mapped to the byte-wide bus by selecting the program range and data range.

Any area not mapped into the NV RAM is reached by the expanded bus on ports 0 and 2. An alternate

configuration allows dynamic partitioning of a 64k space as shown in Figure 11. Selecting PES = 1 provides

another 64k of potential data storage or memory mapped peripheral space as shown in Figure 12. These