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DS21FT42 Datasheet(PDF) 5 Page - Dallas Semiconductor |
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DS21FT42 Datasheet(HTML) 5 Page - Dallas Semiconductor |
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5 / 145 page  DALLAS SEMICONDUCTOR DS21FF42/DS21FT42 101899 /1235 17.1 RECEIVE SIDE ................................ ................................ ...............72 17.2 TRANSMIT SIDE................................ ................................ ............73 17.3 MINIMUM DELAY SYNCHRONOUS RSYSCLK/TSYSCLK MODE .....73 18. HDLC CONTROLLER................................ ................................ ......74 18.1 HDLC FOR DS0S................................ ................................ ...............74 19. FDL/FS EXTRACTION AND INSERTION ................................ .........75 19.1 HDLC AND BOC CONTROLLER FOR THE FDL ............................... 75 19.1.1 General Overview ................................ ................................ ........75 19.1.2 Status Register for the HDLC ................................ ......................76 19.1.3 HDLC/BOC Register Description ................................ ..................79 19.2 LEGACY FDL SUPPORT ................................ ................................ .86 19.2.1 Overview ................................ ................................ ....................86 19.2.2 Receive Section ................................ ................................ ...........86 19.2.3 Transmit Section ................................ ................................ ........87 19.3 D4/SLC–96 OPERATION ................................ ................................ .88 20. PROGRAMMABLE IN–BAND CODE GENERATION AND DETECTION 89 21. TRANSMIT TRANSPARENCY ................................ .......................... 93 22. INTERLEAVED PCM BUS OPERATION ................................ ..........94 23. JTAG-BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT 97 23.1 DESCRIPTION................................ ................................ ....................97 23.2 TAP CONTROLLER STATE MACHINE ................................ ....................98 23.3 INSTRUCTION REGISTER AND INSTRUCTIONS................................ ......... 101 23.4 T EST REGISTERS ................................ ................................ ............. 104 24. TIMING DIAGRAMS ................................ ................................ ...... 109 25. OPERATING PARAME TERS ................................ .......................... 124 26. MCM PACKAGE DIME NSIONS ................................ ...................... 144 DOCUMENT REVISION HISTORY Revision Notes |
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