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FT24C512A Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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FT24C512A Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers |
5 / 17 page FT24C512A DEVICE ADDRESSING The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to invoke a valid read or write command. The first four most significant bits of the device address must be 1010, which is common to all serial EEPROM devices. The next three bits are device address bits. These three device address bits (5 th, 6th and 7th) are to match with the external chip select/address pin states. If a match is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8 th read/write bit, otherwise the chip will go into STANDBY mode. However, matching may not be needed for some or all device address bits (5 th, 6th and 7th) as noted below. The last or 8th bit is a read/write command bit. If the 8 th bit is at VIH then the chip goes into read mode. If a “0” is detected, the device enters programming mode. WRITE OPERATION (A) BYTE WRITE A write operation requires two 8-bit data word address following the device address word and ACKNOWLEDGE signal. Upon receipt of this address, the EEPROM will respond with a “0” and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will again output a “0”. The addressing device, such as a microcontroller, must terminate the write sequence with a STOP condition. At this time the EEPROM enters into an internally-timed write cycle state. All inputs are disabled during this write cycle and the EEPROM will not respond until the writing is completed (figure 5). (B) PAGE WRITE The 512K EEPROM are capable of 128-byte page write. A page write is initiated the same way as a byte write, but the microcontroller does not send a STOP condition after the first data word is clocked in. The microcontroller can transmit up to 127 more data words after the EEPROM acknowledges receipt of the first data word. The EEPROM will respond with a “0” after each data word is received. The microcontroller must terminate the page write sequence with a STOP condition (see Figure 6). The lower 7 bits of the data word address are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. If more than 128 data words are transmitted to the EEPROM, the data word address will “roll over” and the previous data will be overwritten. (C) ACKNOWLEDGE POLLING ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal programming. By issuing a valid read or write address command, the EEPROM will not acknowledge at the 9 th clock cycle if the device is still in the self-timed programming mode. However, if the programming completes and the chip has returned to the STANDBY mode, the device will return a valid ACKNOWLEDGE signal at the 9 th clock cycle. © 2009 Fremont Micro Devices Inc. DS3009E-page 5 |
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