DS1075

5 of 18

Table 2

DIV1

BIT

E/ I

BIT*

MSEL

BIT

M

BIT

OPERATION

0000

INTERNAL OSCILLATOR DIVIDED BY 4*N

0001

INTERNAL OSCILLATOR DIVIDED BY 2*N

0

0

1

X

INTERNAL OSCILLATOR DIVIDED BY N

0

1

X

X

EXTERNAL OSCILLATOR DIVIDED BY N

1

0

X

X

INTERNAL OSCILLATOR DIVIDED BY 1

1

1

X

X

EXTERNAL OSCILLATOR DIVIDED BY 1

DIV WORD Figure 3

(MSB)

(LSB)

N (9-BITS)

PDN

used to determine the timing reference (either the internal oscillator or an external reference/crystal). If

EN0

effect on OUT0, but OUT0 is disabled as part of the power-down sequence.

N

These nine bits determine the value of the programmable divider. The range of divisor values is from 2 to

513, and is equal to the programmed value of N plus 2:

Table 3

BIT

VALUES

DIVISOR (N)

VALUE

000000000

2

000000001

3

..

..

..

..

..

111111111

513

NOTE:

The maximum value of N is constrained by the minimum output frequency. If the internal clock is