DS1000

3 of 5

CAPACITANCE

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Input Capacitance

510

pF

NOTES:

1. Initial tolerances are

±=with respect to the nominal value at 25°C and 5V.

2. Temperature tolerance is

±=with respect to the initial delay value over a range of 0°C to 70°C.

3. The delay will also vary with supply voltage, typically by less than 4% over the range 4.75 to 5.25V.

4. All tap delays tend to vary uni-directionally with temperature or voltage changes. For example, if

TAP 1 slows down, all other taps also slow down; TAP3 can never be faster than TAP2.

5. Intermediate delay values and packaging variations are available on a custom basis. For further

information, call 972-371–4348.

6. All voltages are referenced to ground.

7. Measured with outputs open.

8. Pulse width and period specifications may be exceeded; however, accuracy may be impaired

depending on application (decoupling, layout, etc.). The device will remain functional with pulse

10. See “Test Conditions” section at the end of this data sheet.

TIMING DIAGRAM: SILICON DELAY LINE Figure 2