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W180 Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # W180
Description  Peak Reducing EMI Solution
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

W180 Datasheet(HTML) 1 Page - Cypress Semiconductor

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Peak Reducing EMI Solution
W180
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
July 21, 2000, rev. *A
Features
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Single 1.25% or 3.75% down or center spread output
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 8-pin SOIC (Small Outline Integrated
Circuit)
Key Specifications
Supply Voltages: ........................................... VDD = 3.3V±5%
or VDD = 5V±10%
Frequency Range: .............................. 8 MHz
≤ F
in ≤ 28 MHz
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
Table 1. Modulation Width Selection
SS%
W180-01, 02, 03
Output
W180-51, 52, 53
Output
0Fin ≥ Fout ≥ Fin
1.25%
Fin + 0.625% ≥ Fin≥ –
0.625%
1Fin ≥ Fout ≥ Fin
3.75%
Fin + 1.875% ≥ Fin
–1.875%
Table 2. Frequency Range Selection
FS2
FS1
W180 Option#
-01, 51
(MHz)
-02, 52
(MHz)
-03, 53
(MHz)
00
8
≤ F
IN ≤ 10
8
≤ F
IN ≤ 10
N/A
0
1
10
≤ F
IN ≤ 15
10
≤ F
IN ≤ 15
N/A
1
0
15
≤ F
IN ≤ 18
N/A
15
≤ F
IN ≤ 18
1
1
18
≤ F
IN ≤ 28
N/A
18
≤ F
IN ≤ 28
PREMIS is a trademark of Cypress Semiconductor Corporation.
Simplified Block Diagram
Pin Configurations
Spread Spectrum
W180
(EMI suppressed)
3.3V or 5.0V
Oscillator or
Spread Spectrum
W180
(EMI suppressed)
3.3V or 5.0V
XTAL
X1
X2
Reference Input
Input
Output
Output
8
7
6
5
1
2
3
4
CLKIN or X1
NC or X2
GND
SS%
SSON#
FS1
VDD
CLKOUT
8
7
6
5
1
2
3
4
CLKIN or X1
NC or X2
GND
SS%
FS2
FS1
VDD
CLKOUT
SOIC


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