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CY7B9911 Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY7B9911
Description  High-Speed Low-Voltage Programmable Skew Clock Buffer LV-PSCB
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7B9911 Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY7B9911V
3.3V RoboClock+
4
Electrical Characteristics Over the Operating Range[5]
CY7B9911V
Parameter
Description
Test Conditions
Min.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min., IOH = –18 mA
2.4
V
VOL
Output LOW Voltage
VCC = Min., IOL = 35 mA
0.45
V
VIH
Input HIGH Voltage
(REF and FB inputs only)
2.0
VCC
V
VIL
Input LOW Voltage
(REF and FB inputs only)
– 0.5
0.8
V
VIHH
Three-Level Input HIGH
Voltage (Test, FS, xFn)[6]
Min.
≤ V
CC ≤ Max.
0.87 * VCC
VCC
V
VIMM
Three-Level Input MID
Voltage (Test, FS, xFn)[6]
Min.
≤ V
CC ≤ Max.
0.47 * VCC
0.53 * VCC
V
VILL
Three-Level Input LOW
Voltage (Test, FS, xFn)[6]
Min.
≤ V
CC ≤ Max.
0.0
0.13 * VCC
V
IIH
Input HIGH Leakage Current
(REF and FB inputs only)
VCC = Max., VIN = Max.
20
µA
IIL
Input LOW Leakage Current
(REF and FB inputs only)
VCC = Max., VIN = 0.4V
– 20
µA
IIHH
Input HIGH Current
(Test, FS, xFn)
VIN = VCC
200
µA
IIMM
Input MID Current
(Test, FS, xFn)
VIN = VCC/2
– 50
50
µA
IILL
Input LOW Current
(Test, FS, xFn)
VIN = GND
– 200
µA
IOS
Short Circuit Current[7]
VCC = MAX, VOUT = GND (25° only)
– 200
mA
ICCQ
Operating Current Used by
Internal Circuitry
VCCN = VCCQ = Max.,
All Input Selects Open
Com’l
95
mA
Mil/Ind
100
ICCN
Output Buffer Current per
Output Pair[8]
VCCN = VCCQ = Max.,
IOUT = 0 mA
Input Selects Open, fMAX
19
mA
PD
Power Dissipation per
Output Pair[9]
VCCN = VCCQ = Max.,
IOUT = 0 mA
Input Selects Open, fMAX
104
mW
Capacitance[10]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 3.3V
10
pF
Notes:
5.
See the last page of this specification for Group A subgroup testing information.
6.
These inputs are normally wired to VCC, GND, or left unconnected (actual threshold voltages vary as a percentage of VCC). Internal termination resistors hold
unconnected inputs at VCC/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional tLOCK time
before all data sheet limits are achieved.
7.
CY7B9911V should be tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only.
8.
Total output current per output pair can be approximated by the following expression that includes device current plus load current:
CY7B9911V:ICCN = [(4 + 0.11F) + [[((835 –3F)/Z) + (.0022FC)]N] x 1.1
Where
F = frequency in MHz
C = capacitive load in pF
Z = line impedance in ohms
N = number of loaded outputs; 0, 1, or 2
FC = F
< C
9.
Total power dissipation per output pair can be approximated by the following expression that includes device power dissipation plus power dissipation due to
the load circuit:
PD = [(22 + 0.61F) + [[(1550 + 2.7F)/Z) + (.0125FC)]N] x 1.1
See note 8 for variable definition.
10. Applies to REF and FB inputs only. Tested initially and after any design or process changes that may affect these parameters.


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