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A3942 Datasheet(PDF) 11 Page - Allegro MicroSystems

Part # A3942
Description  A3942KLGTR-T for Automotive Applications
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A3942 Datasheet(HTML) 11 Page - Allegro MicroSystems

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Quad High-Side Gate Driver
for Automotive Applications
A3942
11
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
on a channel-specific basis, according to the following
table:
D4 Setting
Handling of
Off-State Faults
0
Registered
1
Ignored
D5 Read Enable Bit
This bit enables or disables read-
ing on the serial inputs, according to the following
table:
D5 Setting
Handling of
Serial Input
0
Ignored
1
Registered
D6, D7 Address MSB and LSB Bits (Input and Out-
put Fault registers)
For channel-specific bits, these
bits are used to specify which channel is indicated.
The channel-specific bits are:
Register
Channel-Specific Bits
Input
D0, D1, D2, D3, D4
Output
D0, D1, D2
These bits determine the channel, according to the fol-
lowing table:
D7
D6
Channel Selected
00
1
01
2
10
3
11
4
Output FAULT Register
D0 Short-to-Ground (STG) Fault Bit
The voltage
from drain to source for each MOSFET is monitored.
An internal current source sinks IDx from the Dx pins
to set the VDS threshold for each channel, the level at
which an STG fault condition is evaluated.
The A3942 enables monitoring for an STG fault after
the MOSFET is turned on and the turn-on blank time,
tON, expires. (The MOSFET is turned on via the Input
register D0 bit, ORed with the INx discrete input pin
for the channel of the MOSFET, and tON is set by
Input register D1 and D2 bits). If the MOSFET gate-
to-source voltage exceeds the VDS threshold, then
an STG fault will be registered for that channel, the
MOSFET gate will be discharged, and the FAULTZ
pin will be set low (active).
An STG fault is latched until cleared (using the Input
register D3 bit). In the meantime, the other channels
can continue to operate normally.
D1 Short to Battery (STB) Fault Bit
When a chan-
nel turns off, STB fault detection is blanked for tOFF.
Subsequently, if the Sx pin voltage exceeds the VDS
threshold voltage for that channel, an STB fault is
latched. The output for that channel is disabled until
the fault is either cleared (via the Input register D3 bit)
or the off-state fault diagnostics are masked (via the
Input register D4 bit).
Because the output is disabled, there is no active
pull-down during an STB event. Note that, in general,
when the voltage on SX is high enough to trip the STB
comparator, it also trips the OL comparator, and both
the STB and the OL faults are latched.
D2 Open Load (OL) Fault Bit
When a channel turns
off, the OL fault is blanked for tOFF. A small bias
current, IOL, is sourced to the Sx pin of the channel.
There it divides between RSx and the load. If the load
is open, the Sx voltage will rise above the OL fault
detection threshold. In that case, the output is disabled
until the fault is cleared (via the Input register D3 bit)
or the off-state fault diagnostics are masked (via the
Input register D4 bit).
D3 Thermal Warning Bit
A die temperature monitor
is integrated on the A3942 chip. If the die temperature


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