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M-8870 Datasheet(PDF) 5 Page - Clare, Inc.

Part No. M-8870
Description  DTMF Receiver
Download  9 Pages
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Maker  CLARE [Clare, Inc.]
Homepage  http://www.clare.com
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 5 page
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Tone Decoding
FLOW
FHIGH
Key (ref.)
OE
Q4
Q3
Q2
Q1
697
1209
1
H
0
0
0
1
697
1336
2
H
0
0
1
0
697
1477
3
H
0
0
1
1
770
1209
4
H
0
1
0
0
770
1336
5
H
0
1
0
1
770
1477
6
H
0
1
1
0
852
1209
7
H
0
1
1
1
852
1336
8
H
1
0
0
0
852
1477
9
H
1
0
0
1
941
1336
0
H
1
0
1
0
941
1209
S
H
1
0
1
1
941
1477
#
H
1
1
0
0
697
1633
A
H
1
1
0
1
770
1633
B
H
1
1
1
0
852
1633
C
H
1
1
1
1
941
1633
D
H
0
0
0
0
ANY
ANY
ANY
L
Z
Z
Z
Z
L = logic low, H = logic high, Z = high impedance
M-8870
www.clare.com
5
Rev. 3
Differential Input Configuration
Common Crystal Connection
stops the oscillator and the functioning of the filters.
On the M-8870-01 models, this pin is tied to ground
(logic low).
Inhibit mode is enabled by a logic high input to pin 5
(INH). It inhibits the detection of 1633 Hz. The output
code will remain the same as the previous detected
code (see Pin functions table on page 4). On the M-
8870-01 models, this pin is tied to ground (logic low).
Input Configuration
The input arrangement of the M-8870 provides a dif-
ferential input operational amplifier as well as a bias
source (V
REF) to bias the inputs at mid-rail. Provision
is made for connection of a feedback resistor to the
op-amp output (GS) for gain adjustment.
In a single-ended configuration, the input pins are
connected as shown in the Single - Ended Input
Configuration on page 3 with the op-amp connected
for unity gain and V
REF biasing the input at 1/2VDD.
The Differential Input Configuration bellow permits
gain adjustment with the feedback resistor R
5.
DTMF Clock Circuit
The internal clock circuit is completed with the addition
of a standard 3.579545 MHz television color burst crys-
tal. The crystal can be connected to a single M-8870 as
shown in the Single - Ended Input Configuration on
page 3, or to a series of M-8870s. As illustrated in the
Common Crystal Connection below, a single crystal
can be used to connect a series of M-8870s by cou-
pling the oscillator output of each M-8870 through a 30
pF capacitor to the oscillator input of the next M-8870.




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