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CS4360-BZ Datasheet(PDF) 11 Page - Cirrus Logic |
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CS4360-BZ Datasheet(HTML) 11 Page - Cirrus Logic |
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11 / 36 page  CS4360 DS517PP1 11 SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT (For -KS & -KZ parts TA = -10 to +70°C; for -BS & -BZ parts TA = -40 to +85°C; VLC = 1.7 V - 5.5 V; Inputs: Logic 0 = GND, Logic 1 = VLC, CL =30pF) Notes: 20. tspi only needed before first falling edge of CS after RST rising edge. tspi = 0 at all other times. 21. Data must be held for sufficient time to bridge the transition time of CCLK. 22. For FSCK < 1 MHz. Parameter Symbol Min Max Unit CCLK Clock Frequency fsclk -6 MHz RST Rising Edge to CS Falling tsrs 500 - ns CCLK Edge to CS Falling (Note 20) tspi 500 - ns CS High Time Between Transmissions tcsh 1.0 - µs CS Falling to CCLK Edge tcss 20 - ns CCLK Low Time tscl 66 - ns CCLK High Time tsch 66 - ns CDIN to CCLK Rising Setup Time tdsu 40 - ns CCLK Rising to DATA Hold Time (Note 21) tdh 15 - ns Rise Time of CCLK and CDIN (Note 22) tr2 -100 ns Fall Time of CCLK and CDIN (Note 22) tf2 -100 ns t r2 t f2 t dsu t dh t sch t scl CS CCLK CDIN t css t csh t spi t srs RST Figure 3. Control Port Timing - SPI Format |
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