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LNK305P Datasheet(PDF) 7 Page - Power Integrations, Inc.

Part # LNK305P
Description  Lowest Component Count, Energy-Efficient Off-Line Switcher IC
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Manufacturer  POWERINT [Power Integrations, Inc.]
Direct Link  http://www.powerint.com
Logo POWERINT - Power Integrations, Inc.

LNK305P Datasheet(HTML) 7 Page - Power Integrations, Inc.

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Rev. J 06/13
7
LNK302/304-306
www.powerint.com
Table 2 (cont). Common Circuit Configurations Using LinkSwitch-TN.
Topology
Basic Circuit Schematic
Key Features
Low-Side
Buck-Boost –
Optocoupler
Feedback
1. Output referenced to input
2. Positive output (V
O) with respect to +VIN
3. Step up/down – V
O > VIN or VO < VIN
4. Optocoupler feedback
- Accuracy only limited by reference choice
- Low cost non-safety rated optocoupler
- No pre-load required
5. Fail-safe – output is not subjected to input
voltage if the internal power MOSFET fails
6. Minimum no-load consumption
LinkSwitch-TN
PI-3756-041509
+
BP
FB
D
S
VO
VIN
+
Component Selection
Referring to Figure 5, the following considerations may be
helpful in selecting components for a LinkSwitch-TN design.
Freewheeling Diode D1
Diode D1 should be an ultrafast type. For MDCM, reverse
recovery time t
RR ≤75 ns should be used at a temperature of
70 °C or below. Slower diodes are not acceptable, as continuous
mode operation will always occur during startup, causing high
leading edge current spikes, terminating the switching cycle
prematurely, and preventing the output from reaching regulation.
If the ambient temperature is above 70 °C then a diode with t
RR
≤35 ns should be used.
For CCM an ultrafast diode with reverse recovery time t
RR ≤35 ns
should be used. A slower diode may cause excessive leading
edge current spikes, terminating the switching cycle prematurely
and preventing full power delivery.
Fast and slow diodes should never be used as the large reverse
recovery currents can cause excessive power dissipation in the
diode and/or exceed the maximum drain current specification
of LinkSwitch-TN.
Feedback Diode D2
Diode D2 can be a low-cost slow diode such as the 1N400X
series, however it should be specified as a glass passivated
type to guarantee a specified reverse recovery time. To a first
order, the forward drops of D1 and D2 should match.
Inductor L1
Choose any standard off-the-shelf inductor that meets the
design requirements. A “drum” or “dog bone” “I” core inductor
is recommended with a single ferrite element due to its low cost
and very low audible noise properties. The typical inductance
value and RMS current rating can be obtained from the
LinkSwitch-TN design spreadsheet available within the PI Expert
design suite from Power Integrations. Choose L1 greater than
or equal to the typical calculated inductance with RMS current
rating greater than or equal to calculated RMS inductor current.
Capacitor C2
The primary function of capacitor C2 is to smooth the inductor
current. The actual output ripple voltage is a function of this
capacitor’s ESR. To a first order, the ESR of this capacitor
should not exceed the rated ripple voltage divided by the typical
current limit of the chosen LinkSwitch-TN.
Feedback Resistors R1 and R3
The values of the resistors in the resistor divider formed by R1
and R3 are selected to maintain 1.65 V at the FEEDBACK pin. It
is recommended that R3 be chosen as a standard 1% resistor
of 2 kΩ. This ensures good noise immunity by biasing the
feedback network with a current of approximately 0.8 mA.
Feedback Capacitor C3
Capacitor C3 can be a low cost general purpose capacitor. It
provides a “sample and hold” function, charging to the output
voltage during the off time of LinkSwitch-TN. Its value should
be 10 mF to 22 mF; smaller values cause poorer regulation at
light load conditions.
Pre-Load Resistor R4
In high-side, direct feedback designs where the minimum load
is <3 mA, a pre-load resistor is required to maintain output
regulation. This ensures sufficient inductor energy to pull the
inductor side of the feedback capacitor C3 to input return via
D2. The value of R4 should be selected to give a minimum
output load of 3 mA.
In designs with an optocoupler the Zener or reference bias
current provides a 1 mA to 2 mA minimum load, preventing
“pulse bunching” and increased output ripple at zero load.
LinkSwitch-TN Layout Considerations
In the buck or buck-boost converter configuration, since the
SOURCE pins in LinkSwitch-TN are switching nodes, the
copper area connected to SOURCE should be minimized to
minimize EMI within the thermal constraints of the design.
In the boost configuration, since the SOURCE pins are tied to
DC return, the copper area connected to SOURCE can be
maximized to improve heat sinking.
The loop formed between the LinkSwitch-TN, inductor (L1),
freewheeling diode (D1), and output capacitor (C2) should be
kept as small as possible. The BYPASS pin capacitor C1
(Figure 6) should be located physically close to the SOURCE (S)
and BYPASS (BP) pins. To minimize direct coupling from
switching nodes, the LinkSwitch-TN should be placed away


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