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OPA2344PA Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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OPA2344PA Datasheet(HTML) 9 Page - National Semiconductor (TI) |
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9 / 29 page  www.ti.com SBOS107A OPA344, 2344, 4344 OPA345, 2345, 4345 9 APPLICATIONS INFORMATION OPA344 series op amps are unity gain stable and can operate on a single supply, making them highly versatile and easy to use. OPA345 series op amps are optimized for applications requiring higher speeds with gains of 5 or greater. Rail-to-rail input and output swing significantly increases dynamic range, especially in low supply applications. Figure 1 shows the input and output waveforms for the OPA344 in unity-gain configuration. Operation is from VS = +5V with a 10k Ω load connected to V S/2. The input is a 5Vp-p sinusoid. Output voltage is approximately 4.997Vp-p. Power supply pins should be bypassed with 0.01 µF ceramic capacitors. OPERATING VOLTAGE OPA344 and OPA345 series op amps are fully specified and ensured from +2.7V to +5.5V. In addition, many specifica- tions apply from –40ºC to +85ºC. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Performance Curves. RAIL-TO-RAIL INPUT The input common-mode voltage range of the OPA344 and OPA345 series extends 300mV beyond the supply rails. This is achieved with a complementary input stage—an N- channel input differential pair in parallel with a P-channel differential pair (see Figure 2). The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.3V to 300mV above the positive supply, while the P- channel pair is on for inputs from 300mV below the negative supply to approximately (V+) –1.3V. There is a small transition region, typically (V+) – 1.5V to (V+) – 1.1V, in which both pairs are on. This 400mV transition region can vary 300mV with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.8V to (V+) – 1.4V on the low end, up to (V+) – 1.2V to (V+) – 0.8V on the high end. Within the 400mV transition region PSRR, CMRR, offset voltage, offset drift, and THD may be de- graded compared to operation outside this region. For more information on designing with rail-to-rail input op amps, see Figure 3 “Design Optimization with Rail-to-Rail Input Op Amps.” FIGURE 2. Simplified Schematic. V BIAS1 V BIAS2 V IN+ V IN– Class AB Control Circuitry V O V– (Ground) V+ Reference Current FIGURE 1. Rail-to-Rail Input and Output. 5 µs/div Output (inverted on scope) Input G = +1, VS = +5V 5V 0V |
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