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LMV981MG Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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LMV981MG Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 27 page LMV981-N, LMV982-N SNOS976L – NOVEMBER 2001 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance (3) Machine Model 200V Human Body Model 2000V Supply Voltage (V+–V −) 5.5V Differential Input Voltage ± Supply Voltage Voltage at Input/Output Pins V++0.3V, V--0.3V Storage Temperature Range −65°C to 150°C Junction Temperature (4) 150°C For soldering specifications: http://www.ti.com/lit/SNOA549f (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). (4) The maximum power dissipation is a function of TJ(MAX) , θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)–T A)/θJA. All numbers apply for packages soldered directly into a PC board. Operating Ratings (1) Supply Voltage Range 1.8V to 5.0V Temperature Range −40°C to 125°C Thermal Resistance ( θJA) 6-Bump DSBGA 286°C/W SC70-6 414°C/W SOT-23-6 265°C/W VSSOP-10 235°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. 1.8V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V + = 1.8V, V − = 0V, V CM = V +/2, V O = V +/2, R L > 1 MΩ and SHDN tied to V +. Boldface limits apply at the temperature extremes. See (1). Parameter Test Conditions Min (2) Typ (3) Max (2) Units VOS Input Offset Voltage LMV981-N (Single) 1 4 6 mV LMV982 (Dual) 1 5.5 7.5 TCVOS Input Offset Voltage Average Drift 5.5 μV/°C IB Input Bias Current 15 35 nA 50 (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Application Note section for information on temperature derating of this device. Absolute Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically. (2) All limits are specified by testing or statistical analysis. (3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. 2 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMV981-N LMV982-N |
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