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UB2017L-AA-AG6-R Datasheet(PDF) 8 Page - Unisonic Technologies |
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UB2017L-AA-AG6-R Datasheet(HTML) 8 Page - Unisonic Technologies |
8 / 13 page UB2017 Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 8 of 13 www.unisonic.com.tw QW-R502-868.a APPLICATION INFORMATION(Cont.) Thermal Limiting An internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 120°C. This feature protects the UTC UB2017 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the UTC UB2017. The charge current can be set according to typical (not worst-case) ambient temperature with the assurance that the charger will automatically reduce the current in worst-case conditions. The conditions that cause the UTC UB2017 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the IC. Nearly all of this power dissipation is generated by the internal MOSFET. This is calculated to be approximately: ( ) BAT BAT CC D I V V P × − = Where PD is the power dissipated, VCC is the input supply voltage, VBAT is the battery voltage and IBAT is the charge current. The approximate ambient temperature at which the thermal feedback begins to protect the IC is: JA D A P C T θ × − = o 120 ( ) JA BAT BAT CC A I V V C T θ × × − − = o 120 Moreover, when thermal feedback reduces the charge current, the voltage at the PROG pin is also reduced proportionally as discussed in the Operation section. It is important to remember that UTC UB2017 applications do not need to be designed for worst-case thermal conditions since the IC will automatically reduce power dissipation when the junction temperature reaches approximately 120°C. Thermal Considerations Because of the small size of the Thin SOT package, it is very important to use a good thermal PC board layout to maximize the available charge current. The thermal path for the heat generated by the IC is from the die to the copper lead frame, through the package leads, (especially the ground lead) to the PC board copper. The PC board copper is the heat sink. The footprint copper pads should be as wide as possible and expand out to larger copper areas to spread and dissipate the heat to the surrounding ambient. Feed-through vias to inner or backside copper layers are also useful in improving the overall thermal performance of the charger. Other heat sources on the board, not related to the charger, must also be considered when designing a PC board layout because they will affect overall temperature rise and the maximum charge current. The following table lists thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 3/32" FR-4 board with the device mounted on topside. Table 1 Measured Thermal Resistance on 2-Layer Board (Note 1) COPPER AREA BOARD AREA THERMAL RESISTANCE (θJA) JUNCTION-TO-AMBIENT TOPSIDE BACKSIDE 2500mm 2 2500mm 2 2500mm 2 125°C/W 1000mm 2 2500mm 2 2500mm 2 125°C/W 225mm 2 2500mm 2 2500mm 2 130°C/W 100mm 2 2500mm 2 2500mm 2 135°C/W 50mm 2 2500mm 2 2500mm 2 150°C/W Note: 1. Each layer uses one ounce copper Table 2 Measured Thermal Resistance on 4-Layer Board (Note 1) COPPER AREA (EACH SIDE) BOARD AREA THERMAL RESISTANCE (θJA) JUNCTION-TO-AMBIENT 2500mm 2 (Note 2) 2500mm 2 80°C/W Notes: 1. Top and bottom layers use two ounce copper, inner layer use one ounce copper 2. 10,000mm 2 total copper area |
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