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UB264B Datasheet(PDF) 6 Page - Unisonic Technologies

Part # UB264B
Description  LION BATTERY PROTECTION IC FOR 2-SERIAL, 3-SERIAL, OR 4-SERIAL-CELL PACK
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Manufacturer  UTC [Unisonic Technologies]
Direct Link  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

UB264B Datasheet(HTML) 6 Page - Unisonic Technologies

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UB264B
Preliminary
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
6 of 10
www.unisonic.com.tw
QW-R502-833.A
OPERATING(Cont.)
Notes:
1.
The reverse voltage “H” to “L” or “L” to “H” of CTL pin is VDD pin voltage −2.8 V (Typ.), does not have
the hysteresis.
2.
Since the CTL pin implements high resistance of 8MΩ to 12MΩ for pull down, be careful of external
noise application. If an external noise is applied, CO may become “H”. Perform thorough evaluation
using the actual application.
3.
In the UTC UB264B Series, when the CTL pin is open or “L”, CO latches “H”. When the VDD pin
voltage is decreased to the UVLO voltage of 2 V (Typ.) or lower, the latch is reset.
4. Test Mode
In the UTC UB264B Series, the overcharge detection delay time (tCU) can be shortened by entering the test mode.
The test mode can be set by retaining the VDD pin voltage 8.5 V or more higher than the SENSE pin voltage for at
least 80ms (V1=V2=V3=V4=3.5 V, Ta=25°C). The status is retained by the internal latch and the test mode is
retained even if the VDD pin voltage is decreased to the same voltage as that of the SENSE pin. When CO becomes
“H” when the delay time has elapsed after overcharge detection, the latch for retaining the test mode is reset and the
UTC UB264B Series exits from the test mode.
tCU/64
CO Pin
Test mode
Battery voltage
(n=1 to 4)
VCUn
VHCn
Pin voltage
>8.5V
tTST
tCL
SENSE pin voltage
VDD pin voltage
Notes:
1.
When the VDD pin voltage is decreased to lower than the UVLO voltage of 2 V (Typ.), the UTC
UB264B Series returns to the normal mode.
2.
Set the test mode when no batteries are overcharged.
3.
The overcharge release delay time (tCL) is not shortened in the test mode.
4.
The overcharge timer reset delay time (tTR) is not shortened in the test mode.


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