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THS6072CDG4 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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THS6072CDG4 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 31 page  THS6072 LOW-POWER ADSL DIFFERENTIAL RECEIVER SLOS290B – FEBRUARY 2000 – REVISED JUNE 2001 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) dynamic performance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC = ± 15 V Gain = 1 175 MHz Small signal bandwidth ( 3 dB) VCC = ± 5 V Gain = 1 160 MHz Small-signal bandwidth (–3 dB) VCC = ± 15 V Gain = 1 70 MHz BW VCC = ± 5 V Gain = –1 65 MHz BW Bandwidth for 0 1 dB flatness VCC = ± 15 V Gain = 1 35 MHz Bandwidth for 0.1 dB flatness VCC = ± 5 V Gain = 1 35 MHz Full power bandwidth† VO(pp) = 20 V, VCC = ± 15 V 2.7 MHz Full power bandwidth† VO(pp) = 5 V, VCC = ± 5 V 7.1 MHz SR Slew rate‡ VCC = ± 15 V, 20-V step Gain = 5 230 V/ µs SR Slew rate‡ VCC = ± 5 V, 5-V step Gain = 1 170 V/ µs Settling time to 0 1% VCC = ± 15 V, 5-V step Gain = 1 43 ns t Settling time to 0.1% VCC = ± 5 V, 2-V step Gain = –1 30 ns ts Settling time to 0 01% VCC = ± 15 V, 5-V step Gain = 1 233 ns Settling time to 0.01% VCC = ± 5 V, 2-V step Gain = –1 280 ns † Full power bandwidth = slew rate/2 π VO(Peak). ‡ Slew rate is measured from an output level range of 25% to 75%. noise/distortion performance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THD Total harmonic distortion VO(pp) = 2 V, VCC = ± 15 V RL = 1 kΩ –79 dBc THD Total harmonic distortion O( ) , f = 1 MHz, Gain = 2 VCC = ± 5 V RL = 1 kΩ –77 dBc Vn Input voltage noise VCC = ± 5 V or ± 15 V, f = 10 kHz 10 nV/ √Hz In Input current noise VCC = ± 5 V or ± 15 V, f = 10 kHz 0.7 pA/ √Hz Channel-to-channel crosstalk VCC = ± 5 V or ± 15 V, f = 1 MHz –75 dB dc performance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC = ± 15 V VO = ± 10 V RL =1kΩ TA = 25°C 10 19 V/mV Open loop gain VCC = ± 15 V, VO = ± 10 V, RL = 1 kΩ TA = full range 9 V/mV Open loop gain VCC = ± 5V VO = ± 25 V RL = 250 Ω TA = 25°C 8 16 V/mV VCC = ± 5 V, VO = ± 2.5 V, RL = 250 Ω TA = full range 7 V/mV VOS Input offset voltage TA = 25°C 1 7 mV VOS Input offset voltage TA = full range 8 mV Offset voltage drift TA = full range 15 µV/°C IIB Input bias current VCC = ± 5 V or ± 15 V TA = 25°C 1.2 6 µA IIB Input bias current TA = full range 8 µA IOS Input offset current TA = 25°C 20 250 nA IOS Input offset current TA = full range 400 nA Offset current drift TA = full range 0.3 nA/ °C |
Similar Part No. - THS6072CDG4 |
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Similar Description - THS6072CDG4 |
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