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OPA2835 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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OPA2835 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 53 page OPA835 OPA2835 SLOS713E – JANUARY 2011 – REVISED JULY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGING/ORDERING INFORMATION(1) CHANNEL PACKAGE – PACKAGE PRODUCT COUNT LEAD DESIGNATOR OPA835 1 SOT23-6 DBV 1 WQFN-10 RUN OPA2835 2 SOIC-8 D 2 VSSOP-10 DGS 2 WQFN-10 RUN 2 UQFN-10 RMC (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS UNITS VS– to VS+ Supply voltage 5.5 VI Input voltage VS– - 0.7V to VS+ + 0.7V VID Differential input voltage 1 V II Continuous input current 0.85 mA IO Continuous output current 60 mA Continuous power dissipation See Thermal Characteristics Specification TJ Maximum junction temperature 150°C TA Operating free-air temperature range –40°C to 125°C Tstg Storage temperature range –65°C to 150°C HBM 6 kV ESD ratings CDM 1 kV MM 200 V THERMAL INFORMATION OPA835 OPA2835 VSSOP THERMAL METRIC(1) SOT23-6 WQFN-10 SOT23-6 (MSOP) - 10 WQFN-10 UQFN-10 UNITS (DBV) (RUN) (D) (DGS) (RUN) (RMC) 6 PINS 10 PINS 8 PINS 10 PINS 10 PINS 10 PINS θJA Junction-to-ambient thermal resistance 194 145.8 150.1 206 145.8 143.2 θJCtop Junction-to-case (top) thermal resistance 129.2 75.1 83.8 75.3 75.1 49.0 θJB Junction-to-board thermal resistance 39.4 38.9 68.4 96.2 38.9 61.9 °C/W ψJT Junction-to-top characterization parameter 25.6 13.5 33.0 12.9 13.5 3.3 ψJB Junction-to-board characterization parameter 38.9 104.5 67.9 94.6 104.5 61.9 θJCbot Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: OPA835 OPA2835 |
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