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R5F564MGCDBG Datasheet(PDF) 9 Page - Renesas Technology Corp |
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R5F564MGCDBG Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 67 page  RX64M Group 1. Overview Under development Preliminary document Specifications in this document are tentative and subject to change. R01DS0173EJ0090 Rev.0.90 Page 9 of 67 Feb 28, 2014 Parallel data capture unit (PDC) 1 channel Acquisition of synchronization through external 8-bit horizontal and vertical synchronization signals Setting of the image size when clipping of the output for a one-frame image is required 12-bit A/D converter (S12ADC) 12 bits × 2 units (unit 0: 8 channels; unit 1: 21 channels) 12-bit resolution (switchable between 8, 10, and 12 bits) Conversion time (TBD) per channel (for 12-bit conversion) (TBD) per channel (for 10-bit conversion) (TBD) per channel (for 8-bit conversion) Operating mode Scan mode (single scan mode, continuous scan mode, or group scan mode) Group A priority control (only for group scan mode) Sample-and-hold function Common sample-and-hold circuit included In addition, channel-dedicated sample-and-hold function (3ch: in unit 0 only) included Sampling variable Sampling time can be set up for each channel. Digital comparison Method: Comparison to detect voltages above or below thresholds and window comparison Measurement: Comparison of two results of conversion or comparison of a value in the comparison register and a result of conversion Self-diagnostic function The self-diagnostic function internally generates three analog input voltages (unit 0: VREFL0, VREFH0 × 1/2, VREFH0; unit 1: AVSS1, AVCC1 × 1/2, AVCC1) Double trigger mode (A/D conversion data duplicated) Detection of analog input disconnection Three ways to start A/D conversion Software trigger, timer (MTU3, GPT, TMR, TPU) trigger, external trigger Event linking by the ELC 12-bit D/A converter (R12DA) 2 channels 12-bit resolution Output voltage: 0.2 V to AVCC1 0.2 V (amplifier output), 0 V to AVCC1 (direct output) Output via an amplifier or direct output can be selected. Event linking by the ELC Temperature sensor 1 channel Relative precision: ±1°C The voltage of the temperature is converted into a digital value by the 12-bit A/D converter (unit 1). Safety Memory protection unit (MPU) Protection area: Eight areas (max.) can be specified in the range from 0000 0000h to FFFF FFFFh. Minimum protection unit: 16 bytes Reading from, writing to, and enabling the execution access can be specified for each area. An address exception occurs when the detected access is not in the permitted area. Register write protection function Protects important registers from being overwritten for in case a program runs out of control. CRC calculator (CRC) CRC code generation for arbitrary amounts of data in 8-bit units Select any of three generating polynomials: X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable Main clock oscillation stop function Main clock oscillation stop detection: Available Clock frequency accuracy measurement circuit (CAC) Monitors the clock output from the main clock oscillator, sub-clock oscillator, low- and high-speed on-chip oscillators, the PLL frequency synthesizer, IWDT-dedicated on-chip oscillator, and PCLKB, and generates interrupts when the setting range is exceeded. Data operation circuit (DOC) The function to compare, add, or subtract 16-bit data Table 1.1 Outline of Specifications (8/9) Classification Module/Function Description |
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