Data Sheet

Rev.1.2

23.01.2013

Swissbit AG

Industriestrasse 4

Fon: +41 (0) 71 913 03 03

www.swissbit.com

Page 2

CH

– 9552 Bronschhofen

Fax: +41 (0) 71 913 03 15

email: info@swissbit.com

of 14

This Swissbit module family is industry standard 200-pin 8-byte Double Date rate synchronous SDRAM Small

Outline Dual-In-line Memory Modules (So-DIMMs), which are organized as x64 high speed memory arrays

designed for use in non-parity applications. These So-DIMMs are assembled in FBGA Technology. The passive

devices and the EEPROM are SMD components.

The So-DIMMs use serial presence detects (SPD) implemented via serial EEPROM using the two-pin-I

The first 128 bytes are utilized by the So-DIMM manufacturer and the second 128 bytes are available to the end

user.

All Swissbit DDR1 So-DIMMs provide a high performance, flexible 8-byte interface in a 67.6 mm long footprint.

All modules of the extended temperature grade have seen special tests during the manufacturing process to

ensure proper operation according to the field of operation as stated in the environmental conditions.

Module Configuration

Organization

DDR SDRAMs

used

Row

Addr.

Bank

Select

Col.

Addr.

Refresh

Module Dimensions

in mm

64M x 64

8 x 64M x 8

13

BA0, BA1

11

8k

67.60 x 25,4 x 3.80 max

Product Spectrum

Part Number

Module Density

Transfer Rate

Clock Cycle/Data bit rate

Latency

SDN06464D1BJ1SA-50[E/I/W]R

512MB

3.2 GB/s

5.0ns/400MT/s

3.0-3-3

SDN06464D1BJ1SA-60[E/I/W]R

512MB

2.7 GB/s

6.0ns/333MT/s

2.5-3-3

Pin Name

A0-9, A11

– A12

Address Inputs

A10/AP

Address Input/Autoprecharge

BA0, BA1

Bank Selects

DQ0

– DQ63

Data Input/Output

DM0-DM7

Data Masks

RAS#

Row Address Strobe

CAS#

Column Address Strobe

WE#

Read / Write Enable

CKE0

Clock Enable

CK0

Clock Inputs, positive line

CK0#

Clock Inputs, negative line

DQS0- DQS7

Data strobes