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ACPL-M60L-500E Datasheet(PDF) 8 Page - AVAGO TECHNOLOGIES LIMITED

Part # ACPL-M60L-500E
Description  Small Outline, 5 Leads, High CMR, High Speed, Description
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

ACPL-M60L-500E Datasheet(HTML) 8 Page - AVAGO TECHNOLOGIES LIMITED

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Notes:
1. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
exceed 20 mA.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
exceed 15 mA.
3. Derate linearly above +80˚C free-air temperature at a rate of 2.7 mW/˚C for the SOIC-5 package.
4. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in
Figure 11. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
5. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge
of the output pulse.
6. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge
of the output pulse.
7. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified
test conditions.
8. See test circuit for measurement details.
9. CMH is the maximum tolerable rate of rise on the common mode voltage to assure that the output will remain in a high logic state
(i.e., Vo > 2.0 V).
10. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state
(i.e., Vo < 0.8 V).
11. For sinusoidal voltages, (|dVCM | / dt)max = πfCMVCM (p-p).
12. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second (Leakage
detection current limit, II-O ≤ 5 µA).
Parameter
Sym.
Device
Min.
Typ.
Units
Test Conditions
Fig.
Note
Logic High
Common
Mode
Transient
Immunity
|CMH|
ACPL-M60L 15,000
25,000 V/µs
|VCM| = 1000 V
VCC = 3.3 V, IF = 0 mA,
VO(MIN) = 2 V,
RL = 350 Ω, TA = 25˚C
9
9, 11
10,000
15,000
VCC = 5 V, IF = 0 mA,
VO(MIN) = 2 V,
RL = 350 Ω, TA = 25˚C
9
9, 11
Logic Low
Common
Mode
Transient
Immunity
|CML|
ACPL-M60L 15,000
25,000 V/µs
|VCM| = 1000 V
VCC = 3.3 V, IF = 7.5 mA,
VO(MAX) = 0.8 V,
RL = 350 Ω, TA = 25˚C
9
10, 11
10,000
15,000
VCC = 5 V, IF = 7.5 mA,
VO(MIN) = 0.8 V,
RL = 350 Ω, TA = 25˚C
9
10, 11
Figure 1. Typical high level output current vs. temperature.
-60
0
TA - TEMPERATURE - °C
100
10
15
-20
5
20
VCC = 5.5 V
VO = 5.5 V
IF = 250 µA
60
-40
04080
-60
0
TA – TEMPERATURE – C
100
10
15
-20
5
20
VCC = 3.3 V
VO = 3.3 V
IF = 250 µA
60
-40
04080
-60
0
100
10
15
-20
5
20
VCC = 3.3 V
VO = 3.3 V
IF = 250 µA
60
-40
04080


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