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MX25L25835E Datasheet(PDF) 2 Page - Macronix International |
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MX25L25835E Datasheet(HTML) 2 Page - Macronix International |
2 / 85 page 2 MX25L25835E P/N: PM1737 REV. 1.0, NOV. 29, 2011 Contents 1. FEATURES ............................................................................................................................................................. 4 2. GENERAL DESCRIPTION .................................................................................................................................... 6 Table 1. Additional Features at each 128Mb Flash memory .....................................................................6 3. PIN CONFIGURATION ........................................................................................................................................... 7 4. PIN DESCRIPTION................................................................................................................................................. 7 5. BLOCK DIAGRAM.................................................................................................................................................. 8 6. Memory Organization............................................................................................................................................ 9 Table 2. Memory Organization ...................................................................................................................9 7. DEVICE OPERATION........................................................................................................................................... 10 8. DATA PROTECTION..............................................................................................................................................11 Table 3. Protected Area Sizes at each 128Mb Flash memory ................................................................12 Table 4. 4K-bit Secured OTP Definition at Each 128Mb Flash memory ..................................................12 9. HOLD FEATURE................................................................................................................................................... 13 9-1. Figure 2. Hold Condition Operation ....................................................................................................... 13 10. COMMAND DESCRIPTION................................................................................................................................ 14 Table 5. Command Sets...........................................................................................................................14 10-1.Write Enable (WREN)............................................................................................................................. 17 10-2.Write Disable (WRDI) ............................................................................................................................. 18 10-3.Read Identification (RDID)...................................................................................................................... 19 10-4.Read Status Register (RDSR) ................................................................................................................ 20 10-5.Write Status Register (WRSR) ............................................................................................................... 22 10-6.Read Data Bytes (READ) ....................................................................................................................... 25 10-7.Read Data Bytes at Higher Speed (FAST_READ) ................................................................................. 26 10-8.Dual Read Mode (DREAD)..................................................................................................................... 27 10-9.2 x I/O Read Mode (2READ) .................................................................................................................. 28 10-10.Quad Read Mode (QREAD).................................................................................................................. 29 10-11.4 x I/O Read Mode (4READ)................................................................................................................. 30 10-12.Performance Enhance Mode ................................................................................................................ 31 10-13.Performance Enhance Mode Reset (FFh) ............................................................................................ 31 10-14.Burst Read ............................................................................................................................................34 10-15.Sector Erase (SE) ................................................................................................................................. 35 10-16.Block Erase (BE)................................................................................................................................... 36 10-17.Block Erase (BE32K) ............................................................................................................................ 36 10-18.Chip Erase (CE) .................................................................................................................................... 37 10-19.Page Program (PP)............................................................................................................................... 38 10-20.4 x I/O Page Program (4PP) ................................................................................................................. 39 10-21.Continuously program mode (CP mode)............................................................................................... 42 10-22.Deep Power-down (DP) ........................................................................................................................ 44 10-23.Release from Deep Power-down (RDP), Read Electronic Signature (RES)......................................... 45 10-24.Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4)....................................... 47 Table 6. ID Definitions at each 128 Mb Flash memory.............................................................................48 |
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