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MX25L25735EZNI12G Datasheet(PDF) 7 Page - Macronix International |
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MX25L25735EZNI12G Datasheet(HTML) 7 Page - Macronix International |
7 / 71 page 7 MX25L25735E P/N: PM1586 REV. 1.2, FEB. 10, 2012 Table 1. Additional Features GENERAL DESCRIPTION MX25L25735E is 268,435,456 bits serial Flash memory with 4-bytes address interface, which is configured as 33,554,432 x 8 internally. When it is in two or four I/O mode, the structure becomes 134,217,728 bits x 2 or 67,108,864 bits x 4. The MX25L25735E features a serial peripheral interface and software protocol allowing op- eration on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. MX25L25735E, MXSMIOTM (Serial Multi I/O) flash memory, provides sequential read operation on whole chip and multi-I/O features. When it is in dual I/O mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data Input/Output. After program/erase command is issued, auto program/erase algorithms which program/erase and verify the speci- fied page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, or word basis for Continuously Program mode, and erase command is executes on sector (4K-byte), block (32K-byte/64K-byte), or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 200uA DC cur- rent. The MX25L25735E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. Additional Features Part Name Protection and Security Read Performance Flexible or Individual block (or sector) protection 4K-bit secured OTP 1 I/O Read (80 MHz) 2 I/O Read (70 MHz) 4 I/O Read (70 MHz) MX25L25735E V V V V V Additional Features Part Name Identifier RES (command: AB hex) REMS (command: 90 hex) REMS2 (command: EF hex) REMS4 (command: DF hex) RDID (command: 9F hex) MX25L25735E 18 (hex) C2 18 (hex) C2 18 (hex) C2 18 (hex) C2 20 19 (hex) |
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