MX25L1673EZNI10G datasheet(9/65 Pages) MCNIX

Part #	MX25L1673EZNI10G

Description	16M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY

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Manufacturer	MCNIX [Macronix International]

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MX25L1673E

P/N: PM1912

REV. 1.2, JAN. 14, 2014

6. DATA PROTECTION

During power transition, there may be some false system level signals which result in inadvertent erasure or pro-

gramming. The device is designed to protect itself from these accidental write cycles.

The state machine will be reset as standby mode automatically during power up. In addition, the control register ar-

chitecture of the device constrains that the memory contents can only be changed after specific command sequenc-

es have completed successfully.

In the following, there are several features to protect the system from the accidental write cycles during VCC power-

up and power-down or from system noise.

• Valid command length checking: The command length will be checked whether it is at byte base and completed

on byte boundary.

• Write Enable (WREN) command: WREN command is required to set the Write Enable Latch bit (WEL) before

other command to change data. The WEL bit will return to reset stage under following situation:

- Power-up

- Write Disable (WRDI) command completion

- Write Status Register (WRSR) command completion

- Page Program (PP, 4PP) command completion

- Sector Erase (SE) command completion

- Block Erase (BE) command completion

- Chip Erase (CE) command completion

• Deep Power Down Mode: By entering deep power down mode, the flash device also is under protected from

writing all commands except Release from deep power down mode command (RDP) and Read Electronic Sig-

nature command (RES).

• Advanced Security Features: there are some protection and securuity features which protect content from inad-

vertent write and hostile access.

I. Block lock protection

- The Software Protected Mode (SPM) use (BP3, BP2, BP1, BP0) bits to allow part of memory to be protected

as read only. The proected area definition is shown as table of "Protected Area Sizes", the protected areas are

more flexible which may protect various area by setting value of BP0-BP3 bits.

Please refer to table of "protected area sizes".

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