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MX25L1026EM1I10G Datasheet(PDF) 9 Page - Macronix International |
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MX25L1026EM1I10G Datasheet(HTML) 9 Page - Macronix International |
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9 / 49 page  9 P/N: PM1710 REV. 1.3, NOV. 12, 2013 MX25L1026E HOLD FEATURE HOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the operation of write status register, programming, or erasing in progress. The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal while Serial Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Se- rial Clock(SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1. The Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care during the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of the device. To re-start communication with chip, the HOLD# must be at high and CS# must be at low. HOLD# CS# SCLK Hold Condition (standard) Hold Condition (non-standard) Figure 1. Hold Condition Operation |
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