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Datasheet

Datasheet

BD63000MUV

TSZ02201-0P2P0B000130-1-2

© 2012 ROHM Co., Ltd. All rights reserved.

www.rohm.co

TSZ22111・15・001

6) FG output

FG output is reshaped Hall U phase signal and output through FG terminal. It is not output in stand-by mode. In

addition, because FG terminal is output from open drain, please use resistance of about 10k

Ω ~ 100kΩ to pulled up

from outside.

7) Hall input

Hall input amplifier is designed with hysteresis (±15mV(Typ.) in order to prevent incorrect action due to noise inside.

So please set bias current for Hall element to make amplitude of Hall input voltage over minimum input voltage

VREG-1.7V(Typ.)) is designed for Hall input amplifier, so when bias to Hall element, please set within this range.

When Hall inputs all become "H" or "L", detect circuit through Hall input abnormalities to make driver output all "L".

8) Booster circuit

There is built-in booster circuit used to drive upper Nch MOS transistor. VG terminals can produce a boost voltage

(from the VCC voltage + 2×VF voltage (7V(Typ.) reduced by internal regulator) through connecting capacitors

between CP1-CP2 and between VG-VCC. We recommend connected condensers to be over 0.1µF. In addition,

driver outputs will all be "L".

9) Current limit circuit (CL circuit)

Output current limit (Current limit: CL) circuit can be formed by connecting a low resistor used for testing current

between RCL terminal & GND terminal. When RCL voltage is detected over 0.2V(Typ.), lower output will all become

"L". It (32µs(Typ.)) resets automatically after a set amount of time. This action does not synchronize with the action

that PWM signal is input into PWMB terminal.

10) Thermal Shut Down circuit (TSD circuit)

When chip temperature of driver IC rises and exceeds the set temperature (175°C(Typ.)), the thermal shut down

circuit (Thermal Shut Down: TSD) begins working. At this time, the driver outputs all become "L". In addition, the TSD

circuit is designed with hysteresis (25°C(Typ.)), therefore, when the chip temperature drops, it will return to normal

working condition. Moreover, the purpose of the TSD circuit is to protect driver IC from thermal breakdown, therefore,

temperature of this circuit will be over working temperature when it is started up. Thus, thermal design should have

sufficient margin, so do not take continuous use and action of the circuit as precondition.

11) Under voltage lock out circuit (UVLO circuit)

There is a built-in under voltage lock out circuit (Under Voltage Lock Out: UVLO circuit) used to ensure the lowest

(Typ.)), all of the driver outputs should be "L". At the same time, UVLO circuit is designed with hysteresis (1V(Typ.)),

12) Over voltage lock out circuit (OVLO circuit)

There is built-in over voltage lock out circuit (Over Voltage Lock Out: OVLO circuit) used to restrain rise of VCC

action will be conducted. What’s more, because OVLO circuit is designed with hysteresis (1V(Typ.)), therefore, when

condition after a certain time of short brake action.

13) Motor Lock Protection circuit (MLP circuit)

There is built-in motor lock protection circuit (Motor Lock Protection: MLP), ON/OFF of MLP circuit and OVLO

threshold can be set from LPE terminal. Monitor Hall signals, when the LPE = "H" or "M", if Hall signal logic does not

change to 1.1sec(Typ.), driver outputs will all be locked as "L". Latch can be released via standby status or through

switching BRKB/CW logic. Moreover, when PWMB = "H" or open state is detected for about 15ms, latch can be

released by rising and falling edges of subsequent PWMB. However, when LPE = "L", when short brake action

(including switching rotation direction) enables or TSD circuit works, MLP circuit doesn't work. And LPE terminal is

pulled up by VREG through a resistance of 100k

Ω(Typ.)±30 kΩ.

LPE

Monitoring time

OVLO threshold

H or open

1.1sec(Typ.)±30%

M

1.1sec(Typ.)±30%

L

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