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BD81A34EFV-ME2 Datasheet(PDF) 11 Page - Rohm |
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BD81A34EFV-ME2 Datasheet(HTML) 11 Page - Rohm |
11 / 36 page 11/33 Datasheet Datasheet BD81A34MUV-M BD81A34EFV-M TSZ02201-0G3G0C600020-1-2 © 2014 ROHM Co., Ltd. All rights reserved. 16.Jan.2014 Rev.002 www.rohm.com TSZ22111 ・15・001 4. Self-Check Function Table 2. Detection Condition of Each Protection Function and the Operation during Detection Protection Function Detection Condition Operation During Detection [Detection ] [Release/ Cancellation] UVLO VCC<3.5V or VREG<2.0V VCC >4.0V and VREG>3.5V All Blocks Shuts down (Except for VREG) TSD Tj>175°C Tj<150°C All Blocks Shuts down (Except for VREG) OVP VOVP>2.0V VOVP<1.45V SS Pin Discharged OCP VCS ≦VCC-0.6V VCS>VCC-0.6V SS Pin Discharged SCP VLED<0.3V or VOVP<0.57V (100ms delay @300kHz) EN or UVLO Delay Counter starts and then Latches Off all blocks (Except for VREG) LED Open Protection VLED<0.3V & VOVP>1.7V EN or UVLO Only the detected channel latches OFF LED Short Protection VLED>4.5V (100ms delay @300kHz) EN or UVLO Only the detected channel latches OFF (After the counter starts ) Note1. The FAIL1 and FAIL2 output is reset when EN=Low ⇒ High or UVLO Detection ⇒ Release/ Cancel (EN=Low or UVLO Detection are unfixed.) Figure 17. Protection Flag Output Block Diagram The operating status of the built-in protection circuitry is propagated to FAIL1 and FAIL2 terminals (open-drain outputs). FAIL1 becomes low when TSD, OVP, OCP, or SCP protection is engaged, whereas FAIL2 becomes low when open or short LED is detected. If the FAIL terminal will not be used as flag output, please make the FAIL terminal open or connect it to GND. But if the FAIL terminal will be used as a flag output, it is recommended to pull-up the FAIL1, 2 terminals to VREG terminal. (1) Under-Voltage Lock Out (UVLO) The UVLO shuts down all the circuits other than VREG when VCC<3.5V(Typ) or VREG <2.0V(Typ) (2) Thermal Shut Down (TSD) The TSD shuts down all the circuits other than VREG when the Tj reaches 175°C (Typ), and releases when the Tj becomes below 150°C (Typ). (3) Over-Current Protection (OCP) The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor, and activates when the CS voltage becomes less than VCC-0.6V (Typ). When the OCP is activated, the external capacitor of the SS terminal becomes discharged and the switching operation of the DC/DC turns off. (4) Over-Voltage Protection (OVP) The output voltage of DC/DC is detected from the OVP terminal voltage, and the over-voltage protection will activate if the OVP terminal voltage becomes greater than 2.0V (Typ). When OVP is activated, the external capacitor of the SS terminal becomes discharged and the switching operation of the DC/DC turns off. FAIL1 FAIL2 EN=Low or UVLO EN=Low or UVLO FAIL1 FAIL2 |
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