© 2013 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FDMF5822DC • Rev. 1.0.1

3

Pin Configuration

Figure 3.

Pin Configuration - Top View and Transparent View

Pin Definitions

Pin #

Name

Description

1

PWM

PWM input to the gate driver IC

2

ZCD#

Enable input for the ZCD (Auto DCM) comparator

3

VCC

4, 32

AGND

Analog ground for analog portions of the IC and for substrate

5

BOOT

Supply for the high-side MOSFET gate driver. A capacitor from BOOT to PHASE supplies

the charge to turn on the N-channel high-side MOSFET

6

NC

No connect

7

PHASE

Return connection for the boot capacitor, internally tied to SW node

8~11

VIN

Power input for the power stage

12~15, 28

PGND

Power return for the power stage

16~26

SW

Switching node junction between high-side and low-side MOSFETs; also input to the gate

driver SW node comparator and input into the ZCD comparator

27, 33

GL

Gate Low, Low-side MOSFET gate monitor

29

PVCC

Power supply input for LS

30

THWN#

125°C Thermal Warning Flag – pulls LOW upon detection of 125°C thermal warning pre-

set temperature

31

EN /

FAULT#

Dual-functionality, enable input to the gate driver IC. FAULT# - internal pull-down

physically pulls this pin LOW upon detection of fault condition (HS

150°C THDN)

Notes:

1.

LS = Low Side.

2.

HS = High Side.