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FDMF5821DCCT-ND Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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FDMF5821DCCT-ND Datasheet(HTML) 5 Page - Fairchild Semiconductor |
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5 / 25 page  © 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF5821DC • Rev. 1.0.1 5 Electrical Characteristics Typical value is under VIN=12 V, VCC=PVCC=5 V and TA=TJ=+ 25°C unless otherwise noted. Minimum / Maximum values are under VIN=12 V, VCC=PVCC=5 V ± 10% and TJ=TA=-40 ~ 125°C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit Basic Operation IQ Quiescent Current IQ=IVCC + IPVCC, EN=HIGH, PWM=LOW or HIGH or Float (Non-Switching) 2 mA ISHDN Shutdown Current ISHDN=IVCC + IPVCC, EN=GND 3 µA VUVLO UVLO Threshold VCC Rising 3.5 3.8 4.1 V VUVLO_HYST UVLO Hysteresis 0.4 V tD_POR POR Delay to Enable IC VCC UVLO Rising to Internal PWM Enable 20 µs EN Input VIH_EN High-Level Input Voltage 2.0 V VIL_EN Low-Level Input Voltage 0.8 V RPLD_EN Pull-Down Resistance 250 kΩ tPD_ENL EN LOW Propagation Delay PWM=GND, EN Going LOW to GL Going LOW 25 ns tPD_ENH EN HIGH Propagation Delay PWM=GND, EN Going HIGH to GL Going HIGH 20 µs ZCD# Input VIH_ZCD# High-Level Input Voltage 2.0 V VIL_ZCD# Low-Level Input Voltage 0.8 V IPLU_ZCD# Pull-Up Current 10 µA tPD_ZLGLL ZCD# LOW Propagation Delay PWM=GND, ZCD# Going LOW to GL Going LOW (assume IL <=0) 10 ns tPD_ZHGLH ZCD# HIGH Propagation Delay PWM=GND, ZCD# Going HIGH to GL Going HIGH 10 ns PWM Input RUP_PWM Pull-Up Impedance Typical Values: TA=TJ=25°C, VCC=PVCC=5 V, Min. / Max. Values: TA=TJ=-40°C to 125°C, VCC=PVCC=5 V ±10% 10 kΩ RDN_PWM Pull-Down Impedance 10 kΩ VIH_PWM PWM High Level Voltage 3.8 V VTRI_Window 3-State Window 1.2 3.1 V VIL_PWM PWM Low Level Voltage 0.8 V tD_HOLD-OFF 3-State Shut-Off Time 90 130 ns VHIZ_PWM 3-State Open Voltage 2.1 2.5 2.9 V Minimum Controllable On-Time tMIN_PWM_ON PWM Minimum Controllable On- Time Minimum PWM HIGH Pulse Required for SW Node to Switch from GND to VIN 30 ns Forced Minimum GL HIGH Time tMIN_GL_HIGH Forced Minimum GL HIGH Minimum GL HIGH Time when LOW VBOOT-SW detected and PWM LOW=<100 ns 100 ns PWM Propagation Delays & Dead Times (VIN=12 V, VCC=PVCC=5 V, fSW=1 MHz, IOUT=20 A, TA=25°C) tPD_PHGLL PWM HIGH Propagation Delay PWM Going HIGH to GL Going LOW, VIH_PWM to 90% GL 15 ns tPD_PLGHL PWM LOW Propagation Delay PWM Going LOW to GH(6) Going LOW, VIL_PWM to 90% GH 30 ns tPD_PHGHH PWM HIGH Propagation Delay (ZCD# Held LOW) PWM Going HIGH to GH Going HIGH, VIH_PWM to 10% GH (ZCD#=LOW, IL=0, Assumes DCM) 10 ns Continued on the following page… |
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