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SN54LS490 Datasheet(PDF) 1 Page - Motorola, Inc |
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SN54LS490 Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 5 page LOGIC DIAGRAM (ONE HALF SHOWN) MS CP MR 4 12 1 15 2 14 K CD J SD Q K CD J Q K CD J SD Q 3 Q0 13 5 Q1 11 6 Q2 10 7 Q3 9 K CD J Q TRUTH TABLE CP 5-563 FAST AND LS TTL DATA DUAL DECADE COUNTER The SN54 / 74LS490 contains a pair of high-speed 4-stage ripple counters. Each half of the SN54 / 74LS490 has individual Clock, Master Reset and Mas- ter Set (Preset 9) inputs. Each section counts in the 8, 4, 2, 1 BCD code. • Dual Version of SN54/74LS490 • Individual Asynchronous Clear and Preset to 9 for Each Counter • Count Frequency — Typically 65 MHz • Input Clamp Diodes Limit High-Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) 14 13 12 11 10 9 1 2 3 4 5 6 7 16 15 8 VCC CPa CPb MRb Q0b MSb Q2b Q1b Q3b MRa Q0a MSa Q1a Q2a Q3a GND PIN NAMES LOADING (Note a) HIGH LOW MS Master Set (Set to 9) Input 0.5 U.L. 0.25 U.L. MR Master Reset 0.5 U.L. 0.25 U.L. CP Clock Input (Active LOW Going Edge) 1.5 U.L. 1.5 U.L. Q0 – Q3 Counter Outputs (Note b) 10 U.L. 5 (2.5) U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. OUTPUTS COUNT Q3 Q2 Q1 Q0 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H SN54/74LS490 DUAL DECADE COUNTER LOW POWER SCHOTTKY ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXD SOIC J SUFFIX CERAMIC CASE 620-09 N SUFFIX PLASTIC CASE 648-08 16 1 16 1 16 1 D SUFFIX SOIC CASE 751B-03 |
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