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AFL2805DXES Datasheet(PDF) 5 Page - International Rectifier |
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AFL2805DXES Datasheet(HTML) 5 Page - International Rectifier |
5 / 11 page www.irf.com 5 AFL120XXD Series Block Diagram Figure I. AFL Dual Output Figure II. Enable Input Equivalent Circuit Pin 4 or Pin 12 1N4148 100K 290K 150K 2N3904 +5.6V Disable Pin 2 or Pin 8 Circuit Operation and Application Information The switched voltage impressed on the secondary output transformer windings is rectified and filtered to provide the positive and negative converter output voltages. An error amplifier on the secondary side compares the positive output voltage to a precision reference and generates an error signal proportional to the difference. This error signal is magnetically coupled through the feedback transformer into the control section of the converter varying the pulse width of the square wave signal driving the MOSFETs, narrowing the pulse width if the output voltage is too high and widening it if it is too low. These pulse width variations provide the necessary corrections to regulate the magnitude of output voltage within its’ specified limits. Because the primary portion of the circuit is coupled to the secondary side with magnetic elements, full isolation from input to output is maintained. Although incorporating several sophisticated and useful ancilliary features, basic operation of the AFL120XXDseries can be initiated by simply applying an input voltage to pins 1 and 2 and connecting the appropriate loads between pins 7, 8, and 9. Of course, operation of any converter with high power density should not be attempted before secure attachment to an appropriate heat dissipator. (See Thermal Considerations, page 7) Inhibiting Converter Output (Enable) As an alternative to application and removal of the DC voltage to the input, the user can control the converter output by providing TTL compatible, positive logic signals to either of two enable pins (pin 4 or 12). The distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is referenced to the output return (pin 8). Thus, the user has access to an inhibit function on either side of the isolation barrier. Each port is internally pulled “high” so that when not used, an open connection on both enable pins permits normal converter operation. When their use is desired, a logical “low” on either port will shut the converter down. The AFL series of converters employ a forward switched mode converter topology. (refer to Figure I.) Operation of the device is initiated when a DC voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. If pins 4 and 12 are enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. Two power MOSFETs used to chop the DC input voltage into a high frequency square wave, apply this chopped voltage to the power transformer. As this switching is initiated, a voltage is impressed on a second winding of the power transformer which is then rectified and applied to the primary bias supply. When this occurs, the input voltage is excluded from the bias voltage generator and the primary bias voltage becomes internally generated. ERROR AMP & REF OUTPUT FILTER INPUT FILTER OUTPUT RETURN + INPUT INPUT RETURN FB CONTROL 1 2 4 3 5 6 SYNC INPUT CURRENT SENSE ENABLE 2 SHARE SHARE AMPLIFIER 7 11 10 9 12 8 + OUTPUT SYNC OUTPUT ENABLE 1 CASE PRIMARY BIAS SUPPLY - OUTPUT OUTPUT VOLTAGE TRIM FILTER OUTPUT |
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