®

VFC320

8

=5V/(8mA – 1.6mA), one TTL-load = 1.6mA

=781

Ω

Choose a 750

Ω 1/4-watt carbon compensation resistor with

±5% tolerance.

FREQUENCY-TO-VOLTAGE CONVERSION

To operate the VFC320 as a frequency-to-voltage converter,

connect the unit as shown in Figure 9. To interface with

TTL-logic, the input should be coupled through a capacitor,

and the input to pin 10 biased near +2.5V. The converter will

detect the falling edges of the input pulse train as the voltage

Figure 9). For input signals with amplitudes less than 5V,

pin 10 should be biased closer to zero to insure that the input

signal at pin 10 crosses the zero threshold.

Errors are nulled using 0.001 X full scale frequency to null

offset, and full scale frequency to null the gain error. The

procedure is given on this page. Use equations from V/F

TYPICAL APPLICATIONS

Excellent linearity, wide dynamic range, and compatible

TTL, DTL, and CMOS digital output make the VFC320

ideal for a variety of VFC applications. High accuracy

allows the VFC320 to be used where absolute or exact

readings must be made. It is also suitable for systems

requiring high resolution up to 14 bits

Figures 10-14 show typical applications of the VFC320.

FIGURE 9. Connection Diagram for F/V Conversion.

FIGURE 10. Inexpensive A/D with Two-Wire Digital Transmission Over Twisted Pair.

FIGURE 11. Inexpensive Digital Panel Meter.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

Input

Amp

One-

shot

NC

NC

–V

CC

(1)

NC

NC

NC

+V

CC

(1)

C

2

Integrator Capacitor

R

1

R

3

R

5

R

4

+15V

–15V

One-shot

Capacitor

C

1

f

OUT

NOTE: (1) Bypass with 0.01µF

Pin numbers in squares

refer to DIP package.

R

6

12k

Ω

2.5V

R

7

2.2k

Ω

0.001µF

C

3

f

IN

V

OUT

+1V

0V

(t)

T

F

Sensor

INA101

+

–

VFC320

V

IN

f

OUT

Clock

Counter

Computer

Parallel

Data

High Noise

Immunity

Instrumentation

Amp

VFC320

V

IN

f

OUT

Clock

BDC

Counter

Driver/Display

e

1

e

2

Differential

Input