5

SHC5320

®

Input

Feed-

though

Output

Slew Rate

Limited

Settling

Time

Sample

Mode Control

Sample

Offset

Aperture Time

Hold

Acquisition

Time

Aperture

Uncertainty

Droop

Settling

Time

Sample-to-Hold

Transient and

Charge Offset

DISCUSSION OF

SPECIFICATIONS

WHAT IS A SAMPLE/HOLD AMPLIFIER?

A sample/hold amplifier (also sometimes called a track-and-

hold amplifier) is a circuit that captures and holds an analog

voltage at a specific point in time under control of an

external circuit, such as a microprocessor. This type of

circuit has many applications; however, its primary use is in

data acquisition systems which require that the voltage be

captured and held during the analog-to-digital conversion

process. Use of a sample/hold effectively increases the

bandwidth of a data acquisition system by a significant

amount. For further discussion of this capability, refer to

“Signal Digitization” in the Applications section of this data

sheet.

The ideal sample/hold amplifier in its simplest form contains

four primary components as illustrated in Figure 1, although

in actual practice they may not be internally connected

exactly as shown. Amplifier A

high impedance load to the source circuit and supplies

charging current to the holding capacitor C

opens and closes under external control to gate the buffered

input signal to the holding circuit or to remove it so that the

most recently sampled signal will be held. Amplifier A

2

serves to present a high impedance load to the holding

capacitor and to provide a low impedance voltage source for

external loads. A minimum of three terminals are provided

for the user: input, output, and mode control (or sample/hold

control). When S

input signal, subject to errors imposed by amplifier band-

width and other errors as discussed below. When S

opened, the voltage stored on the holding capacitor will be

held indefinitely (in the ideal case), and will appear at the

output of the circuit until S

of the mode control signal.

FIGURE 2. Illustration of Sample/Hold Specifications.

actual acquisition time to be highly dependent on the ampli-

tude of the voltage to be acquired, relative to the value

already held by the capacitor. Therefore, proper specifica-

tion of sample/hold amplifier performance includes defini-

tion of both output value step size and required error band

accuracy.

Aperture Time (or aperture delay time) is the time required

for switch S

the capacitor after the mode control signal has changed from

“sample” to “hold.” This time is measured from the 50%

point of the Hold mode transition to the time at which the

output stops tracking the input. This parameter is very

important in applications for which the input signal is

changing very rapidly when the Hold mode is initiated.

Effective Aperture Time is the difference in propagation

delay times of the analog signal and the mode control signal

from their respective input pins to switch S

be negative, zero, or positive. A negative value indicates that

the mode control propagation delay is shorter than the

analog propagation delay, with the result that the analog

value present on the capacitor at the time the switch opens

occurred earlier than the application of the mode control

signal by the amount of the effective aperture delay time.

Aperture Uncertainty (or aperture jitter) is the variation

observed in the aperture time over a large number of obser-

vations. This parameter is important when the analog input

is a rapidly changing signal, as aperture uncertainty contrib-

utes to lack of knowledge (at the output) about the true value

of the input at the precise time the Hold mode is initiated.

The maximum input frequency for a given acceptable error

contribution due to aperture uncertainty is

f

where Maximum Fractional Error (MFE) is the ratio of the

maximum allowable error voltage to peak voltage, and t

the aperture uncertainty time. For a bipolar

±10V signal and

a maximum uncertainty error of 1/2LSB in a 12-bit system,

the MFE is equal to 1/2LSB

÷ V

0.000244V/V, since 1/2LSB = 2.44mV for a 20V full-scale

range.

For the same system operating with a unipolar 0V to 10V

signal, MFE would be 0.000122V/V.

The following discussion of specifications covers the critical

types of errors which may be experienced in applications of

a sample/hold amplifier. These errors are depicted graphi-

cally in Figure 2, and in the Typical Performance Curves.

Acquisition Time is the time required for the sample/hold

output to settle within a given error band of its final value

after the sample mode is initiated. Included in this time are

effects of switch delay time, slew rate of the buffer ampli-

fier, and settling time for a specified change in held voltage

value. Slew rate limitations of the buffer amplifier will cause

FIGURE 1. Ideal Sample/Hold Amplifier.

+

–

+

–

Input

Mode

Control

Output

C

H

S

1

A

1

A

2