9

®

PCM2702

FIGURE 2. 12MHz Crystal Resonator Connection.

CLOCK AND RESET

The PCM2702 requires a 12MHz (

±500ppm) clock for USB

and audio functions, which may be generated by an on-chip

crystal oscillator with external 12MHz crystal resonator, or

supplied by an external clock applied at XTI (pin1).

The 12MHz crystal resonator must be connected to XTI (pin

1) and XTO (pin 28), along with a 1M

Ω resistor and two

small capacitors (value is dependent upon the specified load

capacitance of the crystal resonator). If an external clock is

used, the clock must be supplied at XTI, and XTO must be

left open. The clock signal applied at XTI must be +3.3V

logic level, as this input is not +5V tolerant. Figures 2 and

3 illustrate the circuit connections required for crystal and

external clock options.

The PCM2702 includes an internal power-on reset circuit,

ceeds 2.0V typical (range: 1.6V to 2.4V). Initialization

requires approximately 350

µs for completion. The V

DD

supply must rise to 2.0V within 10ms for proper power-on

sequence operation.

INTERFACE SEQUENCE

Power-on, Attach, and Playback Sequence

The PCM2702 is ready for setup when the reset sequence

has finished and the USB bus is connected. After connec-

tion is established, the PCM2702 is ready to accept USB

audio data. While waiting for audio data (idle state), the

analog outputs are set to bipolar zero (BPZ) and the zero

flag, ZERO (pin 12), is set to HIGH.

When receiving the audio data, the PCM2702 stores the first

audio packet, which contains 1ms of audio data, into an

internal storage buffer. The PCM2702 starts playing the

audio data upon detection of the Start of Frame (SOF)

packet.

See Figures 4 and 5 for the normal operation sequence.

FIGURE 3. External 12MHz Clock Input Connection.

1

28

XTAL

12MHz

1M

Ω

XTI

XTO

1

28

12MHz External Clock

Must Be Left Open

XTI

XTO