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DSP101JP Datasheet(PDF) 5 Page - Burr-Brown (TI) |
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DSP101JP Datasheet(HTML) 5 Page - Burr-Brown (TI) |
5 / 22 page ® DSP101/102 5 TYPICAL DSP102 FFT SETUP REF VINB VPOTB Burr-Brown ZPB34 DSP Processor CASC SSF OSC1 CLKOUT CLKIN CONV XCLK SYNC SOUTA DSP102 22 12 11 15 20 200kHz 150 Ω 16MHz TTL Oscillator FFT Software ÷80 ÷2 +5V 10 13 21 16 8MHz 27 26 25 0.1µF 1 10µF + 10µF + 220pF 150 Ω 220pF Brüel & Kjaer Model 1049 Digital Signal Generator 6 Pole, 150kHz Low-Pass Filter 1kHz 1/2 OPA2604 1/2 OPA2604 2 VPOTA ±2.75V VINA DSP101 PIN ASSIGNMENTS PIN # NAME DESCRIPTION 1 VPOT Trim Reference Out. 10 µF Tantalum to AGND. Voltage on this pin is approximately 2.75V. 2 VIN Analog In. 3 MSB MSB Adjust In. 4 VOS VOS Adjust In. 5VA– –5V Analog Power. 6VA+ +5V Analog Power. 7 DGND Digital Ground. 8 DGND Digital Ground. 9VD +5V Digital Power. 10 CLKIN Conversion Clock In. 11 CLKOUT Conversion Clock Out. Can drive multiple DSP101/DSP102s to synchronize conversion. 12 SSF Select Synch Format In. If HIGH, SYNC will be active High. If LOW, SYNC will be active Low. See timing diagram (Figure 1). 13 OSC1 Oscillator Point 1 Input/External Clock In. If using external clock, drive with 74HC logic levels. Connect to DGND if not used. 14 OSC2 Oscillator Point 2 Output. Provides drive for crystal oscillator. Make no electrical connection if using external clock. 15 SYNC Data Synchronization Out. Active High when SSF is HIGH; active Low when SSF is LOW. 16 XCLK Data Transfer Clock In. 17 No Internal Connection. 18 TAG User Tag In. Data clocked into this pin is appended to the conversion results on SOUT. See timing diagram (Figure 1). 19 No Internal Connection. 20 SOUT Serial Data Out. MSB first, Binary Two’s Complement format. 21 CONV Convert Command In. Falling edge puts converter into hold state, initiates conversion, and transmits previous conversion results to DSP IC with appropriate SYNC pulse. 22 DGND Digital Ground. 23 No Internal Connection. 24 No Internal Connection. 25 No Internal Connection. 26 CAP Bypass Capacitor. 10 µF Tantalum to AGND. Voltage on this pin is approximately 2.7V. 27 REF Reference Bypass. 0.1 µF Ceramic to AGND. Voltage on this pin is approximately 3.8V. 28 AGND Analog Ground. DSP101 PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS VA+ to Analog Common .................................................................... +7V VA– to Analog Common .................................................................... –7V VD to Digital Common ........................................................................ +7V Analog Common to Digital Common ................................................... ±1V Control Inputs to Digital Common ............................... –0.5 to VD + 0.5V Analog Input Voltage .......................................................................... ±5V Maximum Junction Temperature .................................................... 150oC Internal Power Dissipation ............................................................. 825mW Lead Temperature (soldering, 10s) ............................................... +300oC Thermal Resistance, θ JA, Plastic DIP ............................................ 50 oC/W 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VPOT VIN MSB VOS V – V + DGND DGND V D CLKIN CLKOUT SSF OSC1 OSC2 A A AGND REF CAP DGND CONV SOUT TAG XCLK SYNC DSP101 Top View DIP |
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