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ADS8344E Datasheet(PDF) 2 Page - Burr-Brown (TI) |
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ADS8344E Datasheet(HTML) 2 Page - Burr-Brown (TI) |
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2 / 13 page  ® 2 ADS8344 SPECIFICATION: +5V At TA = –40°C to +85°C, +VCC = +5V, VREF = +5V, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE = 2.4MHz, unless otherwise noted. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ADS8344E, N ADS8344EB, NB PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS ANALOG INPUT Full-Scale Input Span Positive Input - Negative Input 0 VREF TT V Absolute Input Range Positive Input –0.2 +VCC +0.2 TT V Negative Input –0.2 +1.25 TT V Capacitance 25 T pF Leakage Current ±1 T µA SYSTEM PERFORMANCE Resolution 16 T Bits No Missing Codes 14 15 Bits Integral Linearity Error 8 6 LSB Offset Error ±2 ±1mV Offset Error Match 1.2 4 TT LSB(1) Gain Error ±0.05 ±0.024 % Gain Error Match 1.0 4 TT LSB Noise 20 T µVrms Power Supply Rejection +4.75V < VCC < 5.25V 3 T LSB(1) SAMPLING DYNAMICS Conversion Time 16 T Clk Cycles Acquisition Time 4.5 T Clk Cycles Throughput Rate 100 T kHz Multiplexer Settling Time 500 T ns Aperture Delay 30 T ns Aperture Jitter 100 T ps Internal Clock Frequency SHDN = VDD 2.4 T MHz External Clock Frequency 0.024 2.4 TT MHz Data Transfer Only 0 2.4 TT MHz DYNAMIC CHARACTERISTICS Total Harmonic Distortion(2) VIN = 5Vp-p at 10kHz –90 T dB Signal-to-(Noise + Distortion) VIN = 5Vp-p at 10kHz 86 T dB Spurious Free Dynamic Range VIN = 5Vp-p at 10kHz 92 T dB Channel-to-Channel Isolation VIN = 5Vp-p at 10kHz 100 T dB REFERENCE INPUT Range 0.5 +VCC TT V Resistance DCLK Static 5 T G Ω Input Current 40 100 TT µA fSAMPLE = 12.5kHz 2.5 T µA DCLK Static 0.001 3 TT µA DIGITAL INPUT/OUTPUT Logic Family CMOS T Logic Levels VIH | IIH | ≤ +5µA 3.0 5.5 TT V VIL | IIL | ≤ +5µA –0.3 +0.8 TT V VOH IOH = –250µA 3.5 T V VOL IOL = 250µA 0.4 T V Data Format Straight Binary T POWER SUPPLY REQUIREMENTS +VCC Specified Performance 4.75 5.25 TT V Quiescent Current 1.5 2.0 T mA fSAMPLE = 100kHz 300 T µA Power-Down Mode(3), CS = +VCC 3 T µA Power Dissipation 7.5 10 T mW TEMPERATURE RANGE Specified Performance –40 +85 TT °C T Same specifications as ADS8344E. NOTES: (1) LSB means Least Significant Bit. With VREF equal to +5.0V, one LSB is 76µV. (2) First nine harmonics of the test frequency. (3) Auto power-down mode (PD1 = PD0 = 0) active or SHDN = GND. |
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Similar Description - ADS8344E |
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